Clarence S. P. Lee

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2008

2 Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton: On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays. Int. J. Reconfig. Comp. 2008: (2008)

2006

1 Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton: Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays. FPL 2006: 1-8

	2008
2		Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton: On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays. Int. J. Reconfig. Comp. 2008: (2008)
	2006
1		Scott Y. L. Chin, Clarence S. P. Lee, Steven J. E. Wilton: Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays. FPL 2006: 1-8

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