Cheng-Hsing Lee

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2006

1 Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee: A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector. IEICE Transactions 89-C(6): 746-752 (2006)

	2006
1		Ching-Yuan Yang, Yu Lee, Cheng-Hsing Lee: A CMOS Clock and Data Recovery Circuit with a Half-Rate Three-State Phase Detector. IEICE Transactions 89-C(6): 746-752 (2006)

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