dblp.uni-trier.dewww.dagstuhl.dewww.uni-trier.de

Juan Antonio Leñero-Bardallo Coauthor index pubzone.org

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

DBLP keys2011
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: A 3.6 μ s Latency Asynchronous Frame-Free Event-Driven Dynamic-Vision-Sensor. J. Solid-State Circuits 46(6): 1443-1455 (2011)
2010
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: A signed spatial contrast event spike retina chip. ISCAS 2010: 2438-2441
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: A Five-Decade Dynamic-Range Ambient-Light-Independent Calibrated Signed-Spatial-Contrast AER Retina With 0.1-ms Latency and Optional Time-to-First-Spike Mode. IEEE Trans. on Circuits and Systems 57-I(10): 2632-2643 (2010)
2009
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: A Mismatch Calibrated Bipolar Spatial Contrast AER Retina with Adjustable Contrast Threshold. ISCAS 2009: 1493-1496
2008
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: Compact calibration circuit for large neuromorphic arrays. ISCAS 2008: 1776-1779
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Antonio Leñero-Bardallo, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco: A Calibration Technique for Very Low Current and Compact Tunable Neuromorphic Cells: Application to 5-bit 20-nA DACs. IEEE Trans. on Circuits and Systems 55-II(6): 522-526 (2008)

Coauthor Index

1Bernabé Linares-Barranco [1] [2] [3] [4] [5] [6]
2Teresa Serrano-Gotarredona [1] [2] [3] [4] [5] [6]

Last update Sun Jun 3 16:06:10 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page