Erik Larsson

	2012
59		Breeta SenGupta, Urban Ingelsson, Erik Larsson: Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias. VLSI Design 2012: 442-447
58		Breeta SenGupta, Urban Ingelsson, Erik Larsson: Scheduling Tests for 3D Stacked Chips under Power Constraints. J. Electronic Testing 28(1): 121-135 (2012)
	2011
57		Farrokh Ghani Zadegan, Urban Ingelsson, Golnaz Asani, Gunnar Carlsson, Erik Larsson: Test Scheduling in an IEEE P1687 Environment with Resource and Power Constraints. Asian Test Symposium 2011: 525-531
56		Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson: Design automation for IEEE P1687. DATE 2011: 1412-1417
55		Urban Ingelsson, Shih-Yen Chang, Erik Larsson: Measurement point selection for in-operation wear-out monitoring. DDECS 2011: 381-386
54		Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson: Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors. ICCD 2011: 419-426
	2010
53		Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson: Energy-efficient redundant execution for chip multiprocessors. ACM Great Lakes Symposium on VLSI 2010: 143-146
52		Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara: Graph theoretic approach for scan cell reordering to minimize peak shift power. ACM Great Lakes Symposium on VLSI 2010: 73-78
51		Mudassar Majeed, Daniel Ahlstrom, Urban Ingelsson, Gunnar Carlsson, Erik Larsson: Efficient Embedding of Deterministic Test Data. Asian Test Symposium 2010: 159-162
50		Farrokh Ghani Zadegan, Urban Ingelsson, Gunnar Carlsson, Erik Larsson: Test Time Analysis for IEEE P1687. Asian Test Symposium 2010: 455-460
49		Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson: Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors. DATE 2010: 1572-1577
48		Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson: Estimating Error-probability and its Application for Optimizing Roll-back Recovery with Checkpointing. DELTA 2010: 281-285
47		Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson: Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding. DSN 2010: 121-130
46		N. S. Vinay, Indira Rawaty, Erik Larsson, M. S. Gaur, Virendra Singh: Thermal aware test scheduling for stacked multi-chip-modules. EWDTS 2010: 343-349
45		Erik Larsson, Bart Vermeulen, Kees Goossens: A distributed architecture to check global properties for post-silicon debug. European Test Symposium 2010: 182-187
44		Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Hideo Fujiwara: Scan cell reordering to minimize peak power during test cycle: A graph theoretic approach. European Test Symposium 2010: 259
	2009
43		Dan Adolfsson, Joanna Siew, Erik Jan Marinissen, Erik Larsson: On Scan Chain Diagnosis for Intermittent Faults. Asian Test Symposium 2009: 47-54
42		Mikael Väyrynen, Virendra Singh, Erik Larsson: Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips. DATE 2009: 484-489
41		Jaynarayan T. Tudu, Erik Larsson, Virendra Singh, Vishwani D. Agrawal: On Minimization of Peak Power for Scan Circuit during Test. European Test Symposium 2009: 25-30
	2008
40		Anders Larsson, Erik Larsson, Krishnendu Chakrabarty, Petru Eles, Zebo Peng: Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns. DATE 2008: 188-193
39		Anders Larsson, Xin Zhang, Erik Larsson, Krishnendu Chakrabarty: SOC Test Optimization with Compression-Technique Selection. ITC 2008: 1
38		Soheil Samii, Mikko Selkälä, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng: Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 973-977 (2008)
37		Erik Larsson: Architecture for integrated test data compression and abort-on-fail testing in a multi-site environment. IET Computers & Digital Techniques 2(4): 275-284 (2008)
36		Erik Larsson, Zebo Peng: A Reconfigurable Power Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling. J. Electronic Testing 24(5): 497-504 (2008)
	2007
35		Erik Larsson, Jon Persson: An Architecture for Combined Test Data Compression and Abort-on-Fail Test. ASP-DAC 2007: 726-731
34		Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng: Optimized integration of test compression and sharing for SOC testing. DATE 2007: 207-212
33		Tobias Dubois, Erik Jan Marinissen, Mohamed Azimane, Paul Wielage, Erik Larsson, Clemens Wouters: Test quality analysis and improvement for an embedded asynchronous FIFO. DATE 2007: 859-864
32		Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng: A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing. DDECS 2007: 61-66
31		Gunnar Carlsson, Johan Holmqvist, Erik Larsson: Protocol requirements in an SJTAG/IJTAG environment. ITC 2007: 1-9
30		Erik Larsson, Mehdi Amirijoo, Daniel Karlsson, Petru Eles: What impacts course evaluation? ITiCSE 2007: 333
29		Erik Larsson, Per Lindahl, Petter Mostad: HeliCis: a DNA motif discovery tool for colocalized motif pairs with periodic spacing. BMC Bioinformatics 8: (2007)
28		Erik Larsson, Stina Edbom: Test data truncation for test quality maximisation under ATE memory depth constraint. IET Computers & Digital Techniques 1(1): 27-37 (2007)
	2006
27		Soheil Samii, Erik Larsson, Krishnendu Chakrabarty, Zebo Peng: Cycle-Accurate Test Power Modeling and its Application to SoC Test Scheduling. ITC 2006: 1-10
26		Erik Larsson, Zebo Peng: Power-Aware Test Planning in the Early System-on-Chip Design Exploration Process. IEEE Trans. Computers 55(2): 227-239 (2006)
25		Erik Larsson, Hideo Fujiwara: System-on-chip test scheduling with reconfigurable core wrappers. IEEE Trans. VLSI Syst. 14(3): 305-309 (2006)
	2005
24		Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng: SOC Test Scheduling with Test Set Sharing and Broadcasting. Asian Test Symposium 2005: 162-169
23		Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng: Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip. DSD 2005: 403-411
22		David Bäckström, Gunnar Carlsson, Erik Larsson: Remote boundary-scan system test control for the ATCA standard. ITC 2005: 10
21		Erik Larsson, Stina Edbom: Combined Test Data Selection and Scheduling for Test Quality Optimization under ATE Memory Depth Constraint. VLSI-SoC 2005: 221-244
20		Julien Pouget, Erik Larsson, Zebo Peng: Multiple-Constraint Driven System-on-Chip Test Time Optimization. J. Electronic Testing 21(6): 599-611 (2005)
19		Erik Larsson, Julien Pouget, Zebo Peng: Abort-on-Fail Based Test Scheduling. J. Electronic Testing 21(6): 651-658 (2005)
	2004
18		Stina Edbom, Erik Larsson: An Integrated Technique for Test Vector Selection and Test Scheduling under Test Time Constraint. Asian Test Symposium 2004: 254-257
17		Erik Larsson: Integrating Core Selection in the SOC Test Solution Design-Flow. ITC 2004: 1349-1358
16		Erik Larsson, Anders Larsson: Student-oriented examination in a computer architecture course. ITiCSE 2004: 245
15		Erik Larsson, Julien Pouget, Zebo Peng: Defect-Aware SOC Test Scheduling. VTS 2004: 361-366
14		Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng: Efficient test solutions for core-based designs. IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 758-775 (2004)
13		Erik Larsson, Hideo Fujiwara: Preemptive System-on-Chip Test Scheduling. IEICE Transactions 87-D(3): 620-629 (2004)
	2003
12		Erik Larsson, Hideo Fujiwara: Optimal System-on-Chip Test Scheduling. Asian Test Symposium 2003: 306-311
11		Julien Pouget, Erik Larsson, Zebo Peng: SOC Test Time Minimization Under Multiple Constraints. Asian Test Symposium 2003: 312-317
10		Anders Larsson, Erik Larsson, Petru Eles, Zebo Peng: Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip. DFT 2003: 385-392
9		Erik Larsson, Zebo Peng: A Reconfigurable Power-Conscious Core Wrapper and its Application to SOC Test Scheduling. ITC 2003: 1135-1144
8		Erik Larsson, Hideo Fujiwara: Test Resource Partitioning and Optimization for SOC Designs. VTS 2003: 319-324
	2002
7		Erik Larsson, Klas Arvidsson, Hideo Fujiwara, Zebo Peng: Integrated Test Scheduling, Test Parallelization and TAMDesign. Asian Test Symposium 2002: 397-404
6		Erik Larsson, Zebo Peng: An Integrated Framework for the Design and Optimization of SOC Test Solutions. J. Electronic Testing 18(4-5): 385-400 (2002)
	2001
5		Erik Larsson, Zebo Peng: Test Scheduling and Scan-Chain Division under Power Constraint. Asian Test Symposium 2001: 259-264
4		Erik Larsson, Zebo Peng: An integrated system-on-chip test framework. DATE 2001: 138-144
3		Erik Larsson, Zebo Peng, Gunnar Carlsson: The Design and Optimization of SOC Test Solutions. ICCAD 2001: 523-530
	2000
2		John Saul, Betsy Black, Erik Larsson: Helpdesk.Drew.Edu: Home Growing a Helpdesk Solution Using Open-Source Technology. SIGUCCS 2000: 289-293
	1997
1		Xinli Gu, Erik Larsson, Krzysztof Kuchcinski, Zebo Peng: A controller testability analysis and enhancement technique. ED&TC 1997: 153-157

Coauthor Index

1	Dan Adolfsson	[43]
2	Vishwani D. Agrawal	[41]
3	Daniel Ahlstrom	[51]
4	Mehdi Amirijoo	[30]
5	Klas Arvidsson	[7] [14]
6	Golnaz Asani	[57]
7	Mohamed Azimane	[33]
8	David Bäckström	[22]
9	Betsy Black	[2]
10	Gunnar Carlsson	[3] [22] [31] [50] [51] [56] [57]
11	Krishnendu Chakrabarty	[27] [38] [39] [40]
12	Shih-Yen Chang	[55]
13	Tobias Dubois	[33]
14	Stina Edbom	[18] [21] [28]
15	Petru Eles	[10] [23] [24] [30] [32] [34] [40]
16	Hideo Fujiwara	[7] [8] [12] [13] [14] [25] [44] [52]
17	M. S. Gaur	[46]
18	Kees G. W. Goossens (Kees Goossens)	[45]
19	Xinli Gu	[1]
20	Johan Holmqvist	[31]
21	Urban Ingelsson	[48] [50] [51] [55] [56] [57] [58] [59]
22	Daniel Karlsson	[30]
23	Krzysztof Kuchcinski	[1]
24	Anders Larsson	[10] [16] [23] [24] [32] [34] [39] [40]
25	Per Lindahl	[29]
26	Mudassar Majeed	[51]
27	Erik Jan Marinissen	[33] [43]
28	Petter Mostad	[29]
29	Dimitar Nikolov	[48]
30	Zebo Peng	[1] [3] [4] [5] [6] [7] [9] [10] [11] [14] [15] [19] [20] [23] [24] [26] [27] [32] [34] [36] [38] [40]
31	Jon Persson	[35]
32	Julien Pouget	[11] [15] [19] [20]
33	Indira Rawaty	[46]
34	Kewal K. Saluja	[47] [49] [53] [54]
35	Soheil Samii	[27] [38]
36	John Saul	[2]
37	Mikko Selkälä	[38]
38	Breeta SenGupta	[58] [59]
39	Joanna Siew	[43]
40	Virendra Singh	[41] [42] [44] [46] [47] [48] [49] [52] [53] [54]
41	Pramod Subramanyan	[47] [49] [53] [54]
42	Jaynarayan T. Tudu	[41] [44] [52]
43	Mikael Väyrynen	[42]
44	Bart Vermeulen	[45]
45	N. S. Vinay	[46]
46	Paul Wielage	[33]
47	Clemens Wouters	[33]
48	Farrokh Ghani Zadegan	[50] [56] [57]
49	Xin Zhang	[39]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page