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Andrew Laffely Coauthor index pubzone.org

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DBLP keys2004
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson: NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP 2004: 69-75
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJian Liang, Andrew Laffely, S. Srinivasan, Russell Tessier: An architecture and compiler for scalable on-chip communication. IEEE Trans. VLSI Syst. 12(7): 711-726 (2004)
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPrashant Jain, Andrew Laffely, Wayne Burleson, Russell Tessier, Dennis Goeckel: Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations. VLSI Signal Processing 36(1): 27-40 (2004)
2003
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew Laffely, Jian Liang, Russell Tessier, Wayne Burleson: Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores. ICIP (3) 2003: 105-108
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe: Targeting Tiled Architectures in Design Exploration. IPDPS 2003: 172
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew Laffely, Wayne Burleson: Using System On-A-Chip As A Vehicle For VLSI Design Education. MSE 2003: 148-149

Coauthor Index

1Vikas Anand [2]
2Lilian Bossuet [2]
3Wayne P. Burleson (Wayne Burleson) [1] [2] [3] [4] [6]
4Dennis Goeckel [4]
5Guy Gogniat [2]
6Prashant Jain [4]
7Jinwook Jang [6]
8Hempraveen Kukkamalla [6]
9Jian Liang [3] [5]
10Jean Luc Philippe [2]
11S. Srinivasan [5]
12Russell Tessier [3] [4] [5]
13Vishak Venkatraman [6]
14Zhi Zhu [6]

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