 | 2012 |
| 8 |  | Shih-Hung Weng,
Yu-Min Kuo,
Shih-Chieh Chang:
Timing Optimization in Sequential Circuit by Exploiting Clock-Gating Logic.
ACM Trans. Design Autom. Electr. Syst. 17(2): 16 (2012) |
| 2009 |
| 7 |  | Yu-Min Kuo,
Yue-Lung Chang,
Shih-Chieh Chang:
Efficient Boolean Characteristic Function for Timed Automatic Test Pattern Generation.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 417-425 (2009) |
| 6 |  | Yu-Min Kuo,
Ya-Ting Chang,
Shih-Chieh Chang,
Malgorzata Marek-Sadowska:
Spare Cells With Constant Insertion for Engineering Change.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 456-460 (2009) |
| 2008 |
| 5 |  | Yu-Min Kuo,
Shih-Hung Weng,
Shih-Chieh Chang:
A novel sequential circuit optimization with clock gating logic.
ICCAD 2008: 230-233 |
| 4 |  | Shih-Hung Weng,
Yu-Min Kuo,
Shih-Chieh Chang,
Malgorzata Marek-Sadowska:
Timing analysis considering IR drop waveforms in power gating designs.
ICCD 2008: 532-537 |
| 2007 |
| 3 |  | Yu-Min Kuo,
Ya-Ting Chang,
Shih-Chieh Chang,
Malgorzata Marek-Sadowska:
Engineering change using spare cells with constant insertion.
ICCAD 2007: 544-547 |
| 2 |  | Yu-Min Kuo,
Cheng-Hung Lin,
Chun-Yao Wang,
Shih-Chieh Chang,
Pei-Hsin Ho:
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure.
ISQED 2007: 344-349 |
| 2006 |
| 1 |  | Yu-Min Kuo,
Yue-Lung Chang,
Shih-Chieh Chang:
Efficient Boolean characteristic function for fast timed ATPG.
ICCAD 2006: 96-99 |