Steffen Kunze

	2012
5		Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori: A 335Mb/s 3.9mm2 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates. ISSCC 2012: 216-218
	2011
4		Steffen Kunze, Emil Matús, Gerhard Fettweis, Tomoyoshi Kobori: Combining LDPC, turbo and Viterbi decoders: Benefits and costs. SiPS 2011: 216-221
	2009
3		Steffen Kunze, Emil Matús, Gerhard Fettweis: ASIP Decoder Architecture for Convolutional and LDPC Codes. ISCAS 2009: 2457-2460
	2008
2		Marcos B. S. Tavares, Steffen Kunze, Emil Matús, Gerhard Fettweis: Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes. ASAP 2008: 215-220
1		Marcos B. S. Tavares, Emil Matús, Steffen Kunze, Gerhard Fettweis: A dual-core programmable decoder for LDPC convolutional codes. ISCAS 2008: 532-535

Coauthor Index

1	Esther P. Adeva	[5]
2	Holger Eisenreich	[5]
3	Georg Ellguth	[5]
4	Gerhard Fettweis	[1] [2] [3] [4] [5]
5	Sebastian Höppner	[5]
6	Tomoyoshi Kobori	[4] [5]
7	Emil Matús	[1] [2] [3] [4] [5]
8	Björn Mennenga	[5]
9	Stefan Scholze	[5]
10	René Schüffny	[5]
11	Marcos B. S. Tavares	[1] [2]
12	Markus Winter	[5]

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page