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| 2011 | ||
|---|---|---|
| 4 | Santanu Kundu, Santanu Chattopadhyay: Design and Evaluation of Mesh-of-Tree Based Network-on-Chip for Two- and Three-Dimensional Integrated Circuits. ISVLSI 2011: 357-358 | |
| 2009 | ||
| 3 | Santanu Kundu, Kanchan Manna, Shobhit Gupta, Kundan Kumar, Ritesh Parikh, Santanu Chattopadhyay: A Comparative Performance Evaluation of Network-on-Chip Architectures under Self-Similar Traffic. ARTCom 2009: 414-418 | |
| 2008 | ||
| 2 | Santanu Kundu, Santanu Chattopadhyay: Mesh-of-tree deterministic routing for network-on-chip architecture. ACM Great Lakes Symposium on VLSI 2008: 343-346 | |
| 1 | Santanu Kundu, Santanu Chattopadhyay: Network-on-chip architecture design based on mesh-of-tree deterministic routing topology. IJHPSA 1(3): 163-182 (2008) | |
| 1 | Santanu Chattopadhyay | [1] [2] [3] [4] |
| 2 | Shobhit Gupta | [3] |
| 3 | Kundan Kumar | [3] |
| 4 | Kanchan Manna | [3] |
| 5 | Ritesh Parikh | [3] |
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