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Arun Kundu Coauthor index pubzone.org

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DBLP keys2011
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox: FPGA technology mapping with encoded libraries and staged priority cuts. TRETS 4(4): 35 (2011)
2010
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew A. Kennings, Alan Mishchenko, Kristofer Vorwerk, Val Pevzner, Arun Kundu: Efficient FPGA Resynthesis Using Precomputed LUT Structures. FPL 2010: 532-537
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKristofer Vorwerk, Andrew A. Kennings, Val Pevzner, Arun Kundu, Madhu Raman, Julien Dunoyer, Yaun-shung Hsu: Power minimisation during field programmable gate array placement. IET Computers & Digital Techniques 4(3): 170-183 (2010)
2009
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew A. Kennings, Kristofer Vorwerk, Arun Kundu, Val Pevzner, Andy Fox: FPGA technology mapping with encoded libraries andstaged priority cuts. FPGA 2009: 143-150
2008
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKristofer Vorwerk, Madhu Raman, Julien Dunoyer, Yaun-chung Hsu, Arun Kundu, Andrew A. Kennings: A technique for minimizing power during FPGA placement. FPL 2008: 233-238
1999
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSinan Kaptanoglu, Greg Bakker, Arun Kundu, Ivan Corneillet, Ben Ting: A New High Density and Very Low Cost Reprogrammable FPGA Architecture. FPGA 1999: 3-12

Coauthor Index

1Greg Bakker [1]
2Ivan Corneillet [1]
3Julien Dunoyer [2] [4]
4Andy Fox [3] [6]
5Yaun-chung Hsu [2]
6Yaun-shung Hsu [4]
7Sinan Kaptanoglu [1]
8Andrew A. Kennings [2] [3] [4] [5] [6]
9Alan Mishchenko [5]
10Val Pevzner [3] [4] [5] [6]
11Madhu Raman [2] [4]
12Ben Ting (B. S. Ting) [1]
13Kristofer Vorwerk [2] [3] [4] [5] [6]

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