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| 2010 | ||
|---|---|---|
| 2 | Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan: FPGA Based High Performance Double-Precision Matrix Multiplication. International Journal of Parallel Programming 38(3-4): 322-338 (2010) | |
| 2009 | ||
| 1 | Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan: FPGA Based High Performance Double-Precision Matrix Multiplication. VLSI Design 2009: 341-346 | |
| 1 | Siddharth Joshi | [1] [2] |
| 2 | H. Narayanan | [1] [2] |
| 3 | Sachin B. Patkar | [1] [2] |
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