 | 2010 |
| 8 |  | Bob Verbruggen,
Jan Craninckx,
Maarten Kuijk,
Piet Wambacq,
Geert Van der Plas:
A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS.
ISSCC 2010: 296-297 |
| 7 |  | Bob Verbruggen,
Jan Craninckx,
Maarten Kuijk,
Piet Wambacq,
Geert Van der Plas:
A 2.6 mW 6 bit 2.2 GS/s Fully Dynamic Pipeline ADC in 40 nm Digital CMOS.
J. Solid-State Circuits 45(10): 2080-2090 (2010) |
| 2009 |
| 6 |  | Ahmed Mohamed AbdelHamid,
Ankur Anchlia,
Stylianos Mamagkakis,
Miguel Corbalan Miranda,
Bart Dierickx,
Maarten Kuijk:
A Standardized Knobs and Monitors RTL2RTL Insertion Methodology for Fine Grain SoC Tuning.
DSD 2009: 401-408 |
| 2008 |
| 5 |  | Ward Van Der Tempel,
Daniel Van Nieuwenhove,
Riemer Grootjans,
Maarten Kuijk:
A 1 × 64 Complementary Metal Oxide Semiconductor ranging sensor based on Current-Assisted Photonic Demodulators.
IJISTA 5(3/4): 237-245 (2008) |
| 4 |  | Daniel Van Nieuwenhove,
Ward Van Der Tempel,
Riemer Grootjans,
Maarten Kuijk:
Time-Of-Flight distance sensor with enhanced dynamic range.
IJISTA 5(3/4): 246-254 (2008) |
| 2006 |
| 3 |  | J. Balachandran,
Steven Brebels,
Geert Carchon,
Walter De Raedt,
Eric Beyne,
Maarten Kuijk,
Bart Nauwelaers:
Constant Impedance Scaling Paradigm for Scaling LC transmission lines.
ISQED 2006: 387-392 |
| 2 |  | J. Balachandran,
Steven Brebels,
Geert Carchon,
Maarten Kuijk,
Walter De Raedt,
Bart Nauwelaers,
Eric Beyne:
Constant impedance scaling paradigm for interconnect synthesis.
SLIP 2006: 99-105 |
| 1 |  | J. Balachandran,
Steven Brebels,
Geert Carchon,
Maarten Kuijk,
Walter De Raedt,
Bart Nauwelaers,
Eric Beyne:
Wafer-level package interconnect options.
IEEE Trans. VLSI Syst. 14(6): 654-659 (2006) |