 | 2011 |
|---|
| 11 |       | Jaroslav Borecky,
Martin Kohlik,
Pavel Kubalík,
Hana Kubatova:
Fault Models Usability Study for On-line Tested FPGA.
DSD 2011: 287-290 |
| 2010 |
|---|
| 10 | | Jaroslav Borecky,
Martin Kohlik,
Hana Kubatova,
Pavel Kubalík:
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication.
DSD 2010: 380-386 |
| 2009 |
|---|
| 9 | | Jaroslav Borecky,
Pavel Kubalík,
Hana Kubatova:
Reliable Railway Station System Based on Regular Structure Implemented in FPGA.
DSD 2009: 348-354 |
| 2008 |
|---|
| 8 | | Jirí Kvasnicka,
Pavel Kubalík,
Hana Kubatova:
Experimental SEU Impact on Digital Design Implemented in FPGAs.
DSD 2008: 100-103 |
| 7 | | Petr Fiser,
Pavel Kubalík,
Hana Kubatova:
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA.
DSD 2008: 96-99 |
| 6 | | Pavel Kubalík,
Hana Kubatova:
Dependable design technique for system-on-chip.
Journal of Systems Architecture - Embedded Systems Design 54(3-4): 452-464 (2008) |
| 2007 |
|---|
| 5 |  | Pavel Kubalík,
Jirí Kvasnicka,
Hana Kubatova:
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System.
DDECS 2007: 357-360 |
| 2006 |
|---|
| 4 | | Matteo Sonza Reorda,
Ondrej Novák,
Bernd Straube,
Hana Kubatova,
Zdenek Kotásek,
Pavel Kubalík,
Raimund Ubar,
Jiri Bucek:
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), Prague, Czech Republic, April 18-21, 2006
IEEE Computer Society 2006 |
| 3 | | Pavel Kubalík,
Radek Dobias,
Hana Kubatova:
Dependability Computation for Fault Tolerant Reconfigurable Duplex System.
DDECS 2006: 100-102 |
| 2 | | Pavel Kubalík,
Radek Dobias,
Hana Kubatova:
Dependable Design for FPGA Based on Duplex System and Reconfiguration.
DSD 2006: 139-145 |
| 1 | | Pavel Kubalík,
Petr Fiser,
Hana Kubatova:
Fault Tolerant System Design Method Based on Self-Checking Circuits.
IOLTS 2006: 185-186 |
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