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| 1995 | ||
|---|---|---|
| 2 | S. Krishnakumar, P. Suresh, S. Sadashiva Rao, M. P. Pareek, R. Gupta: A single chip, pipelined, cascadable, multichannel, signal processor. VLSI Design 1995: 150-155 | |
| 1 | P. Jayalakshmi, S. Vidya, S. Krishnakumar, K. Ravisankar, P. Kumar: A highly testable ASIC for telephone signaling. VLSI Design 1995: 183- | |
| 1 | R. Gupta | [2] |
| 2 | P. Jayalakshmi | [1] |
| 3 | P. Kumar | [1] |
| 4 | M. P. Pareek | [2] |
| 5 | S. Sadashiva Rao | [2] |
| 6 | K. Ravisankar | [1] |
| 7 | P. Suresh | [2] |
| 8 | S. Vidya | [1] |
Colors in the list of coauthors
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