 | 2002 |
|---|
| 7 |       | Saraju P. Mohanty,
N. Ranganathan,
Vamsi Krishna:
Datapath Scheduling using Dynamic Frequency Clocking.
ISVLSI 2002: 65-70 |
| 1999 |
|---|
| 6 | | Vamsi Krishna,
N. Ranganathan,
Narayanan Vijaykrishnan:
Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages.
VLSI Design 1999: 440- |
| 5 | | Vamsi Krishna,
Ramamurti Chandramouli,
N. Ranganathan:
Computation of lower bounds for switching activity using decision theory.
IEEE Trans. VLSI Syst. 7(1): 125-129 (1999) |
| 4 | | Vamsi Krishna,
N. Ranganathan,
Abdel Ejnioui:
A tree-matching chip.
IEEE Trans. VLSI Syst. 7(2): 277-280 (1999) |
| 1998 |
|---|
| 3 | | Vamsi Krishna,
N. Ranganathan:
A Methodology for High Level Power Estimation and Exploration.
Great Lakes Symposium on VLSI 1998: 420-425 |
| 2 |  | Vamsi Krishna,
Ramamurti Chandramouli,
N. Ranganathan:
Computation of Lower and Upper Bounds for Switching Activity: A Unified Approach.
VLSI Design 1998: 230-233 |
| 1996 |
|---|
| 1 | | Vamsi Krishna,
Abdel Ejnioui,
N. Ranganathan:
A tree matching chip.
VLSI Design 1996: 280-285 |
Data released under the ODC-BY 1.0 license — See also our legal information page