 | 2012 |
| 10 |  | Sunghyun Park,
Tushar Krishna,
Chia-Hsin Owen Chen,
Bhavya Daya,
Anantha Chandrakasan,
Li-Shiuan Peh:
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI.
DAC 2012: 398-405 |
| 2011 |
| 9 |  | Chia-Hsin Owen Chen,
Sunghyun Park,
Tushar Krishna,
Li-Shiuan Peh:
A low-swing crossbar and link generator for low-power networks-on-chip.
ICCAD 2011: 779-786 |
| 8 |  | Tushar Krishna,
Li-Shiuan Peh,
Bradford M. Beckmann,
Steven K. Reinhardt:
Towards the ideal on-chip fabric for 1-to-many and many-to-1 communication.
MICRO 2011: 71-82 |
| 7 |  | Nathan L. Binkert,
Bradford M. Beckmann,
Gabriel Black,
Steven K. Reinhardt,
Ali G. Saidi,
Arkaprava Basu,
Joel Hestness,
Derek Hower,
Tushar Krishna,
Somayeh Sardashti,
Rathijit Sen,
Korey Sewell,
Muhammad Shoaib,
Nilay Vaish,
Mark D. Hill,
David A. Wood:
The gem5 simulator.
SIGARCH Computer Architecture News 39(2): 1-7 (2011) |
| 2010 |
| 6 |  | Tushar Krishna,
Jacob Postman,
Christopher Edmonds,
Li-Shiuan Peh,
Patrick Chiang:
SWIFT: A SWing-reduced interconnect for a Token-based Network-on-Chip in 90nm CMOS.
ICCD 2010: 439-446 |
| 5 |  | Chia-Hsin Owen Chen,
Niket Agarwal,
Tushar Krishna,
Kyung-Hoae Koo,
Li-Shiuan Peh,
Krishna Saraswat:
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs.
NOCS 2010: 173-180 |
| 2009 |
| 4 |  | Niket Agarwal,
Tushar Krishna,
Li-Shiuan Peh,
Niraj K. Jha:
GARNET: A detailed on-chip network model inside a full-system simulator.
ISPASS 2009: 33-42 |
| 3 |  | Tushar Krishna,
Amit Kumar,
Li-Shiuan Peh,
Jacob Postman,
Patrick Chiang,
Mattan Erez:
Express Virtual Channels with Capacitively Driven Global Links.
IEEE Micro 29(4): 48-61 (2009) |
| 2008 |
| 2 |  | Tushar Krishna,
Amit Kumar,
Patrick Chiang,
Mattan Erez,
Li-Shiuan Peh:
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication.
Hot Interconnects 2008: 11-20 |
| 1 |  | B. V. N. Silpa,
Anjul Patney,
Tushar Krishna,
Preeti Ranjan Panda,
G. S. Visweswaran:
Texture filter memory: a power-efficient and scalable texture memory architecture for mobile graphics processors.
ICCAD 2008: 559-564 |