 | 2012 |
| 30 |  | Marco Casale-Rossi,
Pierluigi Rolandi,
Andreas Bruening,
Antun Domic,
Rainer Kress,
Joseph Sawicki,
Christian Sebeke:
Panel: What is EDA doing for trailing edge technologies?
DATE 2012: 874 |
| 2011 |
| 29 |  | Rainer Kress,
Kuo-Ming Lee:
A second degree Newton method for an inverse obstacle scattering problem.
J. Comput. Physics 230(20): 7661-7669 (2011) |
| 28 |  | Olha Ivanyshyn,
Rainer Kress:
Inverse scattering for surface impedance from phase-less far field data.
J. Comput. Physics 230(9): 3443-3452 (2011) |
| 27 |  | Rainer Kress:
Corrigendum to "On the numerical solution of a hypersingular integral equation in scattering theory" [J. Comput. Appl. Math. 61(1995) 345-360].
J. Computational Applied Mathematics 235(9): 3109 (2011) |
| 2010 |
| 26 |  | Olha Ivanyshyn,
Rainer Kress,
Pedro Serranho:
Huygens' principle and iterative methods in inverse obstacle scattering.
Adv. Comput. Math. 33(4): 413-429 (2010) |
| 2005 |
| 25 |  | Ali Yapar,
Hülya Sahintürk,
Ibrahim Akduman,
Rainer Kress:
One-dimensional profile inversion of a cylindrical Layer with inhomogeneous impedance boundary: a Newton-type iterative solution.
IEEE T. Geoscience and Remote Sensing 43(10): 2192-2199 (2005) |
| 2004 |
| 24 |  | Houssem Haddar,
Rainer Kress:
On the Fr[e-acute]chet Derivative for Obstacle Scattering with an Impedance Boundary Condition.
SIAM Journal of Applied Mathematics 65(1): 194-208 (2004) |
| 2000 |
| 23 |  | Rainer Kress,
Andreas Pyttel,
Alexander Sedlmeier:
FPGA-Based Prototyping for Product Definition.
FPL 2000: 78-86 |
| 1999 |
| 22 |  | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
Java Driven Codesign and Prototyping of Networked Embedded Systems.
DAC 1999: 794-797 |
| 21 |  | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
Codesign of Embedded Systems Based on Java and Reconfigurable Hardware Components.
DATE 1999: 768-769 |
| 20 |  | Rainer Kress,
Andreas Pyttel:
Debugging Application-Specific Programmable Products.
FPL 1999: 481-486 |
| 1998 |
| 19 |  | Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress:
A hardware/software prototyping environment for dynamically reconfigurable embedded systems.
CODES 1998: 105-109 |
| 18 |  | Michael Mrva,
Klaus Buchenrieder,
Rainer Kress:
A Scalable Architecture for Multi-threaded JAVA Applications.
DATE 1998: 868-874 |
| 17 |  | Rainer Kress,
Andreas Pyttel:
High-Level Synthesis for Dynamically Reconfigurable Hardware/Software Systems.
FPL 1998: 288-297 |
| 1997 |
| 16 |  | Rainer Kress,
Reiner W. Hartenstein,
Ulrich Nageldinger:
An operating system for custom computing machines based on the Xputer paradigm.
FPL 1997: 304-313 |
| 1996 |
| 15 |  | Reiner W. Hartenstein,
Jürgen Becker,
Michael Herz,
Rainer Kress,
Ulrich Nageldinger:
A Synthesis System For Bus-Based Wavefront Array Architectures.
ASAP 1996: 274-283 |
| 14 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine.
CODES 1996: 77-84 |
| 13 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Two-Level Hardware/Software Partitioning Using CoDe-X.
ECBS 1996: 395- |
| 12 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress:
Custom Computing Machines vs. Hardware/Software Codesign: From a globalized point of view.
FPL 1996: 65-76 |
| 11 |  | Reiner W. Hartenstein,
Jürgen Becker,
Michael Herz,
Rainer Kress,
Ulrich Nageldinger:
A Partitioning Programming Environment for a Novel Parallel Architecture.
IPPS 1996: 544-548 |
| 10 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig:
CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework.
VLSI Design 1996: 81-84 |
| 9 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig:
High-performance computing using a reconfigurable accelerator.
Concurrency - Practice and Experience 8(6): 429-443 (1996) |
| 8 |  | Rainer Kress:
A fast reconfigurable ALU for Xputers.
Universität Kaiserslautern 1996: I-XIV, 1-241 |
| 1995 |
| 7 |  | Reiner W. Hartenstein,
Jürgen Becker,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
A Parallelizing Compilation Method for the Map-oriented Machine.
ASAP 1995: 129-132 |
| 6 |  | Reiner W. Hartenstein,
Rainer Kress:
A datapath synthesis system for the reconfigurable datapath architecture.
ASP-DAC 1995 |
| 5 |  | David Colton,
Rainer Kress:
Eigenvalues of the Far Field Operator for the Helmholtz Equation in an Absorbing Medium.
SIAM Journal of Applied Mathematics 55(6): 1724-1735 (1995) |
| 1994 |
| 4 |  | Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig:
A New FPGA Architecture for Word-Oriented Datapaths.
FPL 1994: 144-155 |
| 3 |  | Andreas Ast,
Jürgen Becker,
Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
Data-Procedural Languages for FPL-based Machines.
FPL 1994: 183-195 |
| 1993 |
| 2 |  | Rainer Kress,
Elmar U. K. Melcher,
Reiner W. Hartenstein,
Michel Dana:
CMOS interconnect modelling for timing analysis.
Microprocessing and Microprogramming 37(1-5): 7-10 (1993) |
| 1992 |
| 1 |  | Andreas Ast,
Reiner W. Hartenstein,
Rainer Kress,
Helmut Reinig,
Karin Schmidt:
Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods.
FPL 1992: 211-217 |