Joseph N. Kozhaya

	2012
9		Haifeng Qian, Phillip J. Restle, Joseph N. Kozhaya, Clifford L. Gunion: Subtractive Router for Tree-Driven-Grid Clocks. IEEE Trans. on CAD of Integrated Circuits and Systems 31(6): 868-877 (2012)
	2011
8		Joseph N. Kozhaya, Phillip Restle, Haifeng Qian: Myth busters: Microprocessor clocking is from Mars, ASICs clocking is from Venus. ICCAD 2011: 271-275
	2008
7		Aida Todri, Malgorzata Marek-Sadowska, Joseph N. Kozhaya: Power supply noise aware workload assignment for multi-core systems. ICCAD 2008: 330-337
	2004
6		Haifeng Qian, Joseph N. Kozhaya, Sani R. Nassif, Sachin S. Sapatnekar: A chip-level electrostatic discharge simulation strategy. ICCAD 2004: 315-318
	2002
5		Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm: A multigrid-like technique for power grid analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1148-1160 (2002)
	2001
4		Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm: Multigrid-Like Technique for Power Grid Analysis. ICCAD 2001: 480-487
3		Joseph N. Kozhaya, Farid N. Najm: Power estimation for large sequential circuits. IEEE Trans. VLSI Syst. 9(2): 400-407 (2001)
	2000
2		Sani R. Nassif, Joseph N. Kozhaya: Fast power grid simulation. DAC 2000: 156-161
	1997
1		Joseph N. Kozhaya, Farid N. Najm: Accurate power estimation for large sequential circuits. ICCAD 1997: 488-493

Coauthor Index

1	Clifford L. Gunion	[9]
2	Malgorzata Marek-Sadowska	[7]
3	Farid N. Najm	[1] [3] [4] [5]
4	Sani R. Nassif	[2] [4] [5] [6]
5	Haifeng Qian	[6] [8] [9]
6	Phillip Restle (Phillip J. Restle)	[8] [9]
7	Sachin S. Sapatnekar	[6]
8	Aida Todri (Aida Todri-Sanial)	[7]

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