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Tianming Kong Coauthor index pubzone.org

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DBLP keys2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJason Cong, Tianming Kong, Z. D. Pan: Buffer block planning for interconnect planning and prediction. IEEE Trans. VLSI Syst. 9(6): 929-937 (2001)
2000
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJason Cong, Tianming Kong, Faming Liang, Jun S. Liu, Wing Hung Wong, Dongmin Xu: Dynamic weighting Monte Carlo for constrained floorplan designs in mixed signal application. ASP-DAC 2000: 277-282
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTony F. Chan, Jason Cong, Tianming Kong, Joseph R. Shinnerl: Multilevel Optimization for Large-Scale Circuit Placement. ICCAD 2000: 171-176
1999
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJason Cong, Tianming Kong, Dongmin Xu, Faming Liang, Jun S. Liu, Wing Hung Wong: Relaxed Simulated Tempering for VLSI Floorplan Designs. ASP-DAC 1999: 13-16
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJason Cong, Tianming Kong, David Zhigang Pan: Buffer block planning for interconnect-driven floorplanning. ICCAD 1999: 358-363

Coauthor Index

1Tony F. Chan [3]
2Jason Cong [1] [2] [3] [4] [5]
3Faming Liang [2] [4]
4Jun S. Liu [2] [4]
5David Z. Pan (David Zhigang Pan) [1]
6Z. D. Pan [5]
7Joseph R. Shinnerl [3]
8Wing Hung Wong [2] [4]
9Dongmin Xu [2] [4]

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