 | 2010 |
|---|
| 9 |       | Toshiaki Kitamura,
Yuya Matsunami:
Numerical Analysis of DWDD Disk with Control Layer.
IEICE Transactions 93-C(12): 1713-1716 (2010) |
| 8 | | Toshiaki Kitamura,
Shingo Iwata:
Analysis of a Near-Field Optical Disk with an Acute-Edged Metallic Nano-Aperture.
IEICE Transactions 93-C(9): 1474-1477 (2010) |
| 2008 |
|---|
| 7 | | Takahiro Sasaki,
Yuji Ichikawa,
Tetsuo Hironaka,
Toshiaki Kitamura,
Toshio Kondo:
Evaluation of low-energy and high-performance processor using variable stages pipeline technique.
IET Computers & Digital Techniques 2(3): 230-238 (2008) |
| 2007 |
|---|
| 6 | | Taiji Sasaoka,
Hideyuki Kawabata,
Toshiaki Kitamura:
A MATLAB-Based Code Generator for Parallel Sparse Matrix Computations Utilizing PSBLAS.
IEICE Transactions 90-D(1): 2-12 (2007) |
| 2004 |
|---|
| 5 | | Hideyuki Kawabata,
Mutsumi Suzuki,
Toshiaki Kitamura:
A MATLAB-Based Code Generator for Sparse Matrix Computations.
APLAS 2004: 280-295 |
| 2001 |
|---|
| 4 | | Masahiro Goshima,
Kengo Nishino,
Toshiaki Kitamura,
Yasuhiko Nakashima,
Shinji Tomita,
Shin-ichiro Mori:
A high-speed dynamic instruction scheduling scheme for superscalar processors.
MICRO 2001: 225-236 |
| 1995 |
|---|
| 3 | | Yasuhiko Nakashima,
Toshiaki Kitamura,
Hideo Tamura,
Masaaki Takiuchi,
Ken'ichi Miura:
Scalar Processor of the VPP500 Parallel Supercomputer.
International Conference on Supercomputing 1995: 348-356 |
| 1983 |
|---|
| 2 | | Shinji Tomita,
Kiyoshi Shibayama,
Toshiaki Kitamura,
Toshiyuki Nakata,
Hiroshi Hagiwara:
A User-Microprogrammable, Local Host Computer With Low-Level Parallelism
ISCA 1983: 151-157 |
| 1980 |
|---|
| 1 |  | Kiyoshi Shibayama,
Shinji Tomita,
Hiroshi Hagiwara,
Katsuhiro Yamazaki,
Toshiaki Kitamura:
Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism.
IFIP Congress 1980: 181-186 |
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