 | 2012 |
|---|
| 7 |       | Ki Chul Chun,
Pulkit Jain,
Tae-Ho Kim,
Chris H. Kim:
A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches.
J. Solid-State Circuits 47(2): 547-559 (2012) |
| 2011 |
|---|
| 6 | | Tae-Ho Kim,
Jong-Seok Han,
Sang-Soon Im,
Jae-Young Jang,
Jin-Ku Kang:
A 4Gb/s adaptive FFE/DFE receiver with data-dependent jitter measurement.
ESSCIRC 2011: 351-354 |
| 5 | | Tae-Ho Kim,
Yong-Hwan Moon,
Jin-Ku Kang:
A 4 Gb/s Adaptive FFE/DFE Receiver with a Data-Dependent Jitter Measurement.
IEICE Transactions 94-C(11): 1779-1786 (2011) |
| 2010 |
|---|
| 4 | | Sang-Ho Kim,
Hyung-Min Park,
Tae-Ho Kim,
Jin-Ku Kang,
Jin-Ho Kim,
Jae-Youl Lee,
Yoon-Kyung Choi,
Myunghee Lee:
A 1.7Gbps DLL-based Clock Data Recovery in 0.35µm CMOS.
SoCC 2010: 84-87 |
| 3 | | Jae-Wook Yoo,
Tae-Ho Kim,
Dong-Kyun Kim,
Jin-Ku Kang:
A CMOS 5.4/3.24Gbps dual-rate clock and data recovery design for DisplayPort v1.2.
SoCC 2010: 88-91 |
| 2009 |
|---|
| 2 | | Seungwon Lee,
Tae-Ho Kim,
Jae-Wook Yoo,
Jin-Ku Kang:
A 2.7Gbps & 1.62Gbps dual-mode clock and data recovery for DisplayPort in 0.18μm CMOS.
SoCC 2009: 179-182 |
| 2007 |
|---|
| 1 | | Kwang-Jae Kim,
In-Jun Jeong,
Jeong-Cheol Park,
Young-Jun Park,
Chan-Gyu Kim,
Tae-Ho Kim:
The impact of network service performance on customer satisfaction and loyalty: High-speed internet service case in Korea.
Expert Syst. Appl. 32(3): 822-831 (2007) |
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