Soontae Kim

	2012
29		Mohammad Abdur Rouf, Soontae Kim: Low-cost control flow error protection by exploiting available redundancies in the pipeline. ASP-DAC 2012: 175-180
	2011
28		Yebin Lee, Soontae Kim: DRAM energy reduction by prefetching-based memory traffic clustering. ACM Great Lakes Symposium on VLSI 2011: 103-108
27		Kwangcheol Shin, Kyungjun Kim, Soontae Kim: ADSR: Angle-Based Multi-hop Routing Strategy for Mobile Wireless Sensor Networks. APSCC 2011: 373-376
26		Tayyeb Mahmood, Soontae Kim: Realizing near-true voltage scaling in variation-sensitive l1 caches via fault buffers. CASES 2011: 85-94
25		Taeju Park, Soontae Kim: Dynamic scheduling algorithm and its schedulability analysis for certifiable dual-criticality systems. EMSOFT 2011: 253-262
24		Jongmin Lee, Seokin Hong, Soontae Kim: TLB index-based tagging for cache energy reduction. ISLPED 2011: 85-90
23		Soontae Kim, Jongmin Lee, Jesung Kim, Seokin Hong: Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits. MICRO 2011: 420-429
	2010
22		Soontae Kim, Jongmin Lee: Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system. ACM Great Lakes Symposium on VLSI 2010: 257-262
21		Jesung Kim, Soontae Kim, Yebin Lee: SimTag: Exploiting tag bits similarity to improve the reliability of the data caches. DATE 2010: 941-944
20		Seokin Hong, Soontae Kim: Lizard: Energy-efficient hard fault detection, diagnosis and isolation in the ALU. ICCD 2010: 342-349
19		Tayyeb Mahmood, Soontae Kim: Fine-Grained Fault Tolerance for Process Variation-Aware Caches. ISVLSI 2010: 46-51
18		Mohammad Abdur Rouf, Soontae Kim: Modeling and Evaluation of Control Flow Vulnerability in the Embedded System. MASCOTS 2010: 430-433
	2009
17		Jongmin Lee, Soontae Kim: An energy-delay efficient 2-level data cache architecture for embedded system. ISLPED 2009: 343-346
16		Seokin Hong, Soontae Kim: TEPS: Transient Error Protection Utilizing Sub-word Parallelism. ISVLSI 2009: 286-291
15		Soontae Kim: Reducing Area Overhead for Error-Protecting Large L2/L3 Caches. IEEE Trans. Computers 58(3): 300-310 (2009)
14		Koustav Bhattacharya, Nagarajan Ranganathan, Soontae Kim: A Framework for Correction of Multi-Bit Soft Errors in L2 Caches Based on Redundancy. IEEE Trans. VLSI Syst. 17(2): 194-206 (2009)
	2007
13		Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan: Improving the reliability of on-chip L2 cache using redundancy. ICCD 2007: 224-229
12		Soontae Kim: Reducing ALU and Register File Energy by Dynamic Zero Detection. IPCCC 2007: 365-371
11		Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin: Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocessors and Microsystems 31(5): 293-301 (2007)
	2006
10		Soontae Kim: Area-efficient error protection for caches. DATE 2006: 1282-1287
	2004
9		Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin: Scheduling Reusable Instructions for Power Reduction. DATE 2004: 148-155
8		Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Optimizing Leakage Energy Consumption in Cache Bitlines. Design Autom. for Emb. Sys. 9(1): 5-18 (2004)
7		Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin: Instruction Scheduling for Low Power. VLSI Signal Processing 37(1): 129-149 (2004)
6		J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, Soontae Kim: Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Wireless Networks 10(2): 183-195 (2004)
	2003
5		Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang: Masking the Energy Behavior of DES Encryption. DATE 2003: 10084-10089
4		Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John: On load latency in low-power caches. ISLPED 2003: 258-261
3		Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin: Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embedded Comput. Syst. 2(2): 163-185 (2003)
	2001
2		Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali: Power-aware partitioned cache architectures. ISLPED 2001: 64-67
1		Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin: Energy Behavior of Java Applications from the Memory Perspective. Java™ Virtual Machine Research and Technology Symposium 2001: 207-220

Coauthor Index

1	Koustav Bhattacharya	[13] [14]
2	Richard R. Brooks	[5]
3	E. Geethanjali	[2]
4	Seokin Hong	[16] [20] [23] [24]
5	Jie S. Hu	[9]
6	Ali R. Hurson (A. R. Hurson)	[6]
7	Mary Jane Irwin	[1] [2] [3] [4] [5] [7] [8] [9] [11]
8	Lizy Kurian John (Lizy K. John)	[4]
9	J. Juran	[6]
10	Mahmut T. Kandemir	[1] [2] [3] [5] [7] [8] [9]
11	Jesung Kim	[21] [23]
12	Kyungjun Kim	[27]
13	Yebin Lee	[21] [28]
14	Jongmin Lee	[17] [22] [23] [24]
15	Tayyeb Mahmood	[19] [26]
16	Amisha Parikh	[7]
17	Taeju Park	[25]
18	N. Ranganathan (Nagarajan Ranganathan)	[13] [14]
19	Mohammad Abdur Rouf	[18] [29]
20	Hendra Saputra	[5]
21	Kwangcheol Shin	[27]
22	Anand Sivasubramaniam	[1] [2] [3]
23	Samarjeet Singh Tomar	[1]
24	Narayanan Vijaykrishnan (Vijaykrishnan Narayanan)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [11]
25	Wei Zhang	[5]

Colors in the list of coauthors

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