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Keunwoo Kim Coauthor index pubzone.org

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DBLP keys2012
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYi-Bo Liao, Meng-Hsueh Chiang, Keunwoo Kim, Wei-Chou Hsu: Assessment of structure variation in silicon nanowire FETs and impact on SRAM. Microelectronics Journal 43(5): 300-304 (2012)
2010
18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJae-Joon Kim, Rahul M. Rao, Keunwoo Kim: Technology-circuit co-design of asymmetric SRAM cells for read stability improvement. CICC 2010: 1-4
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj: FinFET SRAM Design. VLSI Design 2010: 440-445
2009
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das: Yield estimation of SRAM circuits using "Virtual SRAM Fab". ICCAD 2009: 631-636
2008
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Rajiv V. Joshi, Keunwoo Kim, Ching-Te Chuang: Variability Analysis for sub-100nm PD/SOI Sense-Amplifier. ISQED 2008: 488-491
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRouwaida Kanj, Rajiv V. Joshi, Keunwoo Kim, Richard Williams, Sani R. Nassif: Statistical Evaluation of Split Gate Opportunities for Improved 8T/6T Column-Decoupled SRAM Cell Yield. ISQED 2008: 702-707
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAditya Bansal, Jae-Joon Kim, Keunwoo Kim, Saibal Mukhopadhyay, Ching-Te Chuang, Kaushik Roy: Optimal Dual-VT Design in Sub-100 Nanometer PDSOI and Double-Gate Technologies. VLSI Design 2008: 125-130
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka: Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. VLSI Syst. 16(12): 1657-1665 (2008)
2007
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang: Design and analysis of Thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies. ISLPED 2007: 20-25
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajiv V. Joshi, Rouwaida Kanj, Keunwoo Kim, Richard Q. Williams, Ching-Te Chuang: A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. ISLPED 2007: 8-13
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJie Deng, Keunwoo Kim, Ching-Te Chuang, H.-S. Philip Wong: Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI. ISQED 2007: 145-152
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang: A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. VLSI Design 2007: 665-672
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy: Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices. Microelectronics Journal 38(8-9): 931-941 (2007)
2006
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy: Modeling and Analysis of Leakage Currents in Double-Gate Technologies. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2052-2061 (2006)
2005
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Keunwoo Kim, Ching-Te Chuang, Kaushik Roy: Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits. ISLPED 2005: 8-13
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSaibal Mukhopadhyay, Keunwoo Kim, Jae-Joon Kim, Shih-Hsien Lo, Rajiv V. Joshi, Ching-Te Chuang, Kaushik Roy: Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. ISQED 2005: 410-415
2004
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKeunwoo Kim, Koushik K. Das, Rajiv V. Joshi, Ching-Te Chuang: Nanoscale CMOS circuit leakage power reduction by double-gate device. ISLPED 2004: 102-107
2003
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKeunwoo Kim, Rajiv V. Joshi, Ching-Te Chuang: Strained-si devices and circuits for low-power applications. ISLPED 2003: 180-183
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChing-Te Chuang, Rajiv V. Joshi, Ruchir Puri, Keunwoo Kim: Design Considerations of Scaled Sub-0.1 ?m PD/SOI CMOS Circuits. ISQED 2003: 153-158

Coauthor Index

1Emrah Acar [16]
2Aditya Bansal [13] [16]
3Meng-Hsueh Chiang [19]
4Ching-Te Chuang [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16]
5Koushik K. Das [3] [16]
6Jie Deng [9]
7Fadi H. Gebara [12]
8Fook-Luen Heng [16]
9Wei-Chou Hsu [19]
10Rajiv V. Joshi [1] [2] [3] [4] [7] [8] [10] [14] [15] [17]
11Rouwaida Kanj [10] [14] [16] [17]
12Jae-Joon Kim [4] [7] [13] [18]
13Jente B. Kuang [12]
14Jin-Fuw Lee [16]
15Yi-Bo Liao [19]
16Shih-Hsien Lo [4] [7]
17Saibal Mukhopadhyay [4] [5] [6] [7] [11] [13] [15] [16]
18Sani R. Nassif [14] [16]
19Hung C. Ngo [12]
20Edward J. Nowak [8]
21Kevin J. Nowka [12]
22Ruchir Puri [1]
23Rahul M. Rao [18]
24Kaushik Roy [4] [5] [6] [7] [13]
25Rama N. Singh [16]
26Amith Singhee [16]
27Richard Williams [14]
28Richard Q. Williams [8] [10]
29H.-S. Philip Wong [9]

Colors in the list of coauthors

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