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| 2012 | ||
|---|---|---|
| 44 | Hyun-Woo Lee, Soo-Bin Lim, Junyoung Song, Jabeom Koo, Dae-Han Kwon, Jong-Ho Kang, Yunsaing Kim, Young-Jung Choi, Kunwoo Park, Byong-Tae Chung, Chulwoo Kim: A 283.2μW 800Mb/s/pin DLL-based data self-aligner for Through-Silicon Via (TSV) interface. ISSCC 2012: 48-50 | |
| 43 | Phi-Hung Pham, Jongsun Park, Phuong Mau, Chulwoo Kim: Design and Implementation of Backtracking Wave-Pipeline Switch to Support Guaranteed Throughput in Network-on-Chip. IEEE Trans. VLSI Syst. 20(2): 270-283 (2012) | |
| 42 | Moo-young Kim, Hokyu Lee, Chulwoo Kim: PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration. IEEE Trans. VLSI Syst. 20(4): 737-741 (2012) | |
| 41 | Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Sohn, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung: A 1.6 V 1.4 Gbp/s/pin Consumer DRAM With Self-Dynamic Voltage Scaling Technique in 44 nm CMOS Technology. J. Solid-State Circuits 47(1): 131-140 (2012) | |
| 40 | Sewook Hwang, Minyoung Song, Young-Ho Kwak, Inhwa Jung, Chulwoo Kim: A 3.5 GHz Spread-Spectrum Clock Generator With a Memoryless Newton-Raphson Modulation Profile. J. Solid-State Circuits 47(5): 1199-1208 (2012) | |
| 2011 | ||
| 39 | Sewook Hwang, Minyoung Song, Young-Ho Kwak, Inhwa Jung, Chulwoo Kim: A 0.076mm2 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS. ISSCC 2011: 360-362 | |
| 38 | Hyun-Woo Lee, Ki-Han Kim, Young-Kyoung Choi, Ju-Hwan Shon, Nak-Kyu Park, Kwan-Weon Kim, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung: A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology. ISSCC 2011: 502-504 | |
| 37 | Moo-young Kim, Jinwoo Kim, Tagjong Lee, Chulwoo Kim: 10-bit 100-MS/s Pipelined ADC Using Input-Swapped Opamp Sharing and Self-Calibrated V/I Converter. IEEE Trans. VLSI Syst. 19(8): 1438-1447 (2011) | |
| 36 | Jungmoon Kim, Jihwan Kim, Chulwoo Kim: A Regulated Charge Pump With a Low-Power Integrated Optimum Power Point Tracking Algorithm for Indoor Solar Energy Harvesting. IEEE Trans. on Circuits and Systems 58-II(12): 802-806 (2011) | |
| 35 | Sang-Yoon Lee, Hyung-Rok Lee, Young-Ho Kwak, Woo-Seok Choi, Byoung-Joo Yoo, Daeyun Shim, Chulwoo Kim, Deog-Kyoon Jeong: 250 Mbps-5 Gbps Wide-Range CDR With Digital Vernier Phase Shifting and Dual-Mode Control in 0.13 μ m CMOS. J. Solid-State Circuits 46(11): 2560-2570 (2011) | |
| 2010 | ||
| 34 | Hyun-Woo Lee, Yong-Hoon Kim, Won-Joo Yun, Eun Young Park, Kang Youl Lee, Jaeil Kim, Kwang Hyun Kim, Jongho Jung, Kyung Whan Kim, Nam Gyu Rye, Kwan-Weon Kim, Jun Hyun Chun, Chulwoo Kim, Young-Jung Choi, Byong-Tae Chung, Joong Sik Kih: A 7.7mW/1.0ns/1.35V delay locked loop with racing mode and OA-DCC for DRAM interface. ISCAS 2010: 3861-3864 | |
| 33 | Youngsun Han, Peter Harliman, Seon Wook Kim, Jong-Kook Kim, Chulwoo Kim: A Novel Architecture for Block Interleaving Algorithm in MB-OFDM Using Mixed Radix System. IEEE Trans. VLSI Syst. 18(6): 1020-1024 (2010) | |
| 32 | Sunghwa Ok, Kyunghoon Chung, Jabeom Koo, Chulwoo Kim: An Antiharmonic, Programmable, DLL-Based Frequency Multiplier for Dynamic Frequency Scaling. IEEE Trans. VLSI Syst. 18(7): 1130-1134 (2010) | |
| 31 | Young-Ho Kwak, Inhwa Jung, Chulwoo Kim: A ħbox Gb/s+ Slew-Rate/Impedance-Controlled Output Driver With Single-Cycle Compensation Time. IEEE Trans. on Circuits and Systems 57-II(2): 120-125 (2010) | |
| 2009 | ||
| 30 | Kisoo Kim, Hokyu Lee, Sangdon Jung, Chulwoo Kim: A 366kS/s 400uW 0.0013mm2 frequency-to-digital converter based CMOS temperature sensor utilizing multiphase clock. CICC 2009: 203-206 | |
| 29 | Minyoung Song, Young-Ho Kwak, Sunghoon Ahn, Wooseok Kim, ByeongHa Park, Chulwoo Kim: A 10MHz to 315MHz cascaded hybrid PLL with piecewise linear calibrated TDC. CICC 2009: 243-246 | |
| 28 | Phi-Hung Pham, Phuong Mau, Chulwoo Kim: A 64-PE folded-torus intra-chip communication fabric for guaranteed throughput in Network-on-Chip based applications. CICC 2009: 645-648 | |
| 27 | Jabeom Koo, Gil-Su Kim, Junyoung Song, Kwan-Weon Kim, Young-Jung Choi, Chulwoo Kim: Small-area high-accuracy ODT/OCD by calibration of global on-chip for 512M GDDR5 application. CICC 2009: 717-720 | |
| 26 | Dongsuk Shin, Jabeom Koo, Won-Joo Yun, Young-Jung Choi, Chulwoo Kim: A Fast-lock Synchronous Multi-phase Clock Generator based on a Time-to-digital Converter. ISCAS 2009: 1-4 | |
| 25 | Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim: A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. VLSI Syst. 17(10): 1461-1469 (2009) | |
| 24 | Jabeom Koo, Sunghwa Ok, Chulwoo Kim: A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock. IEEE Trans. on Circuits and Systems 56-II(1): 21-25 (2009) | |
| 23 | Inhwa Jung, Daejung Shin, Taejin Kim, Chulwoo Kim: A 140-Mb/s to 1.82-Gb/s Continuous-Rate Embedded Clock Receiver for Flat-Panel Displays. IEEE Trans. on Circuits and Systems 56-II(10): 773-777 (2009) | |
| 2008 | ||
| 22 | Inhwa Jung, Moo-young Kim, Chulwoo Kim: A 1.2GHz delayed clock generator for high-speed microprocessors. ASP-DAC 2008: 95-96 | |
| 21 | Young-Ho Kwak, Inhwa Jung, Chulwoo Kim: A slew-rate controlled output driver with one-cycle tuning time. ASP-DAC 2008: 99-100 | |
| 20 | Inhwa Jung, Gunok Jung, Janghoon Song, Moo-young Kim, Junyoung Park, Sung-Bae Park, Chulwoo Kim: A 0.004-mm2 Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor. IEEE Trans. on Circuits and Systems 55-II(2): 116-120 (2008) | |
| 2007 | ||
| 19 | Pilsung Choe, Chulwoo Kim, Mark R. Lehto, Jan P. Allebach: Experimental Comparison of Adaptive vs. Static Thumbnail Displays. HCI (2) 2007: 41-48 | |
| 18 | Chulwoo Kim, Mark R. Lehto: Decision Theoretic Perspective on Optimizing Intelligent Help. HCI (3) 2007: 358-365 | |
| 17 | Chulwoo Kim, Pilsung Choe, Mark R. Lehto, Jan P. Allebach: Effect of Providing a Web-Based Collaboration Medium for Remote Customer Troubleshooting Tasks. HCI (9) 2007: 47-53 | |
| 16 | Dongkyu Park, Seoksoo Yoon, Inhwa Jung, Chulwoo Kim: Noise-Aware Split-Path Domino Logic and its Clock Delaying Scheme. Journal of Circuits, Systems, and Computers 16(1): 139-154 (2007) | |
| 15 | Inhwa Jung, Moo-young Kim, Chulwoo Kim: Sptpl: a New Pulsed Latch Type Flip-Flop in High-Performance System-on-a-Chip (SOC). Journal of Circuits, Systems, and Computers 16(2): 169-179 (2007) | |
| 2006 | ||
| 14 | Phi-Hung Pham, Yogendera Kumar, Chulwoo Kim: High Performance and Area-Efficient Circuit-Switched Network on Chip Design. CIT 2006: 243 | |
| 13 | Inhwa Jung, Moo-young Kim, Dongsuk Shin, Seon Wook Kim, Chulwoo Kim: A New Energy x Delay-Aware Flip-Flop. IEICE Transactions 89-A(6): 1552-1557 (2006) | |
| 12 | Pilsung Choe, Chulwoo Kim, Mark R. Lehto, Xinran Lehto, Jan P. Allebach: Evaluating and Improving a Self-Help Technical Support Web Site: Use of Focus Group Interviews. Int. J. Hum. Comput. Interaction 21(3): 333-354 (2006) | |
| 2005 | ||
| 11 | Youngsun Han, Seon Kim, Chulwoo Kim: Jaguar: A Compiler Infrastructure for Java Reconfigurable Computing. ICESS 2005: 386-397 | |
| 2004 | ||
| 10 | Seoksoo Yoon, Seok-Ryong Yoon, Seon Wook Kim, Chulwoo Kim: Charge-Sharing-Problem Reduced Split-Path Domino Logic. VLSI Design 2004: 201- | |
| 2003 | ||
| 9 | Tae-Chan Kim, Meejoung Kim, Chulwoo Kim, Bong-Young Chung, Soo-Won Kim: Low Power Response Time Accelerator with Full Resolution for LCD Panel. PATMOS 2003: 319-327 | |
| 8 | Tae-Chan Kim, Chulwoo Kim, Bong-Young Chung, Soo-Won Kim: Low Power Cache with Successive Tag Comparison Algorithm. PATMOS 2003: 599-606 | |
| 7 | Jaegeun Oh, Seon Wook Kim, Chulwoo Kim: OpenMP and Compilation Issue in Embedded Applications. WOMPAT 2003: 109-121 | |
| 6 | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang: Energy-efficient skewed static logic with dual Vt: design and synthesis. IEEE Trans. VLSI Syst. 11(1): 64-70 (2003) | |
| 2001 | ||
| 5 | Chulwoo Kim, Sung-Mo Kang: A low-power reduced swing single clock flip-flop. ISCAS (4) 2001: 806-809 | |
| 4 | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang: Energy-efficient skewed static logic design with dual Vt. ISCAS (4) 2001: 882-885 | |
| 3 | Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang: New current-mode sense amplifiers for high density DRAM and PIM architectures. ISCAS (4) 2001: 938-941 | |
| 2000 | ||
| 2 | Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang: High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. ICCD 2000: 59-64 | |
| 1999 | ||
| 1 | Chulwoo Kim, Seung-Moon Yoo, Sung-Mo Kang: NMOS Energy Recovery Logic. Great Lakes Symposium on VLSI 1999: 310-313 | |
Colors in the list of coauthors
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