 | 2011 |
| 28 |  | Jin Woo Ahn,
Dong Oh Son,
Hyung Gyu Jeon,
Jong-Myon Kim,
Cheol Hong Kim:
Complexity Adaptive Branch Predictor for Thermal-Aware 3D Multi-core Processors.
FGIT-CA/CES3 2011: 333-343 |
| 27 |  | Dong Oh Son,
Young Jin Park,
Jin Woo Ahn,
Jae Hyung Park,
Jong-Myon Kim,
Cheol Hong Kim:
Thermal-Aware Floorplan Schemes for Reliable 3D Multi-core Processors.
ICCSA (2) 2011: 463-474 |
| 26 |  | Myeongsu Kang,
Jiwon Choi,
Yong-Min Kim,
Cheol Hong Kim,
Jong-Myon Kim:
Implementation of High-Performance Sound Synthesis Engine for Plucked-String Instruments.
ICIC (1) 2011: 480-487 |
| 25 |  | Ngoc Thi Thu Nguyen,
Mohammad A. Haque,
Cheol Hong Kim,
Jong-Myon Kim:
Audio Segmentation and Classification Using a Temporally Weighted Fuzzy C-Means Algorithm.
ISNN (2) 2011: 447-456 |
| 2010 |
| 24 |  | Young Jin Park,
Min Zeng,
Byeong-Seok Lee,
Jeong-A. Lee,
Seung Gu Kang,
Cheol Hong Kim:
Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling.
ACIS-ICIS 2010: 69-74 |
| 23 |  | Hong Jun Choi,
Young Jin Park,
Seung Gu Kang,
Cheol Hong Kim,
Sung Woo Chung,
Jong-Myon Kim,
Dongseop Kwon:
Thermal-aware Duplicated Filter Cache for Improving Processor Reliability.
CDES 2010: 160-168 |
| 22 |  | Jong-Myon Kim,
Yong-Min Kim,
Cheol Hong Kim:
Performance Evaluation of Multimedia Extensions on Variable Many-Core Processors.
CDES 2010: 98-104 |
| 21 |  | Young Jin Park,
Hong Jun Choi,
Cheol Hong Kim,
Jong-Myon Kim:
Energy-aware Filter Cache Architecture for Multicore Processors.
DELTA 2010: 58-62 |
| 20 |  | Pranab Kumar Dhar,
Mohammad Ibrahim Khan,
Cheol Hong Kim,
Jong-Myon Kim:
An Efficient Audio Watermarking Algorithm in Frequency Domain for Copyright Protection.
FGIT-SecTech/DRBC 2010: 104-113 |
| 19 |  | Pranab Kumar Dhar,
Cheol Hong Kim,
Jong-Myon Kim:
Robust Audio Watermarking Scheme Based on Deterministic Plus Stochastic Model.
FGIT-SecTech/DRBC 2010: 114-125 |
| 18 |  | Jong-Myon Kim,
Sung Woo Chung,
Cheol Hong Kim:
Energy-aware instruction cache design using small trace cache.
IET Computers & Digital Techniques 4(4): 293-305 (2010) |
| 2009 |
| 17 |  | Hyung Beom Jang,
Ikroh Yoon,
Cheol Hong Kim,
Seungwon Shin,
Sung Woo Chung:
The impact of liquid cooling on 3D multi-core processors.
ICCD 2009: 472-478 |
| 16 |  | Jeonghwan Lee,
Gilsang Yoon,
Insik Cho,
Changwoo Seo,
Changhyeon Chae,
Nara Yang,
Taejin Jung,
Cheol Hong Kim,
Intae Hwang,
Cheolwoo You,
Daeki Hong:
Performance Analysis of the Combined AMC-MIMO Systems with Independent MCS Level Selection.
ICWN 2009: 297-302 |
| 15 |  | Gilsang Yoon,
Jeonghwan Lee,
Insik Cho,
Changwoo Seo,
Changhyeon Chae,
Nara Yang,
Taejin Jung,
Cheol Hong Kim,
Intae Hwang,
Cheolwoo You,
Daeki Hong:
Throughput Improvement of Iterative Decoding Algorithm in the V-BLAST-AMC System with a STD Scheme.
ICWN 2009: 435-442 |
| 14 |  | Huynh Van Luong,
Yong-Min Kim,
Byung-Kook Kim,
Jong-Myon Kim,
Cheol Hong Kim:
Parallel Approach to Fuzzy Vector Quantization for Image Compression.
SNPD 2009: 510-515 |
| 2008 |
| 13 |  | Nara Yang,
Gilsang Yoon,
Jeonghwan Lee,
Intae Hwang,
Cheol Hong Kim,
Jong-Myon Kim:
Loop Detection for Energy-Aware High Performance Embedded Processors.
APSCC 2008: 1578-1583 |
| 12 |  | Eui-Young Chung,
Cheol Hong Kim,
Sung Woo Chung:
An Accurate and Energy-Efficient Way Determination Technique for Instruction Caches by Early Tab Matching.
DELTA 2008: 190-195 |
| 2007 |
| 11 |  | Eui-Young Chung,
Hyo-Joong Suh,
Cheol Hong Kim,
Sung Woo Chung:
Is the Complicated ECC Array Necessary for Data Caches?
CDES 2007: 137-139 |
| 2006 |
| 10 |  | Cheol Hong Kim,
Sung Woo Chung,
Chu Shik Jhon:
An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors.
IEICE Transactions 89-D(4): 1450-1458 (2006) |
| 9 |  | Jong Wook Kwak,
Cheol Hong Kim,
Sung-Hoon Shim,
Chu Shik Jhon:
Advanced High-Level Cache Management by Processor Access Information.
J. Inf. Sci. Eng. 22(1): 215-227 (2006) |
| 8 |  | Cheol Hong Kim,
Sung Woo Chung,
Chu Shik Jhon:
PP-cache: A partitioned power-aware instruction cache architecture.
Microprocessors and Microsystems 30(5): 268-279 (2006) |
| 2005 |
| 7 |  | Soong Hyun Shin,
Cheol Hong Kim,
Chu Shik Jhon:
An Effective Instruction Cache Prefetch Policy by Exploiting Cache History Information.
EUC 2005: 57-66 |
| 6 |  | Cheol Hong Kim,
Sung-Hoon Shim,
Jong Wook Kwak,
Sung Woo Chung,
Chu Shik Jhon:
First-Level Instruction Cache Design for Reducing Dynamic Energy Consumption.
SAMOS 2005: 103-111 |
| 5 |  | Sung-Hoon Shim,
Jong Wook Kwak,
Cheol Hong Kim,
Sung Tae Jhang,
Chu Shik Jhon:
Power-Aware Branch Logic: A Hardware Based Technique for Filtering Access to Branch Logic.
SAMOS 2005: 162-171 |
| 2004 |
| 4 |  | Cheol Hong Kim,
Jong Wook Kwak,
Seong Tae Jhang,
Chu Shik Jhon:
Adaptive Block Management for Victim Cache by Exploiting L1 Cache History Information.
EUC 2004: 1-11 |
| 3 |  | Sung-Hoon Shim,
Cheol Hong Kim,
Jong Wook Kwak,
Chu Shik Jhon:
Hybrid Technique for Reducing Energy Consumption in High Performance Embedded Processor.
EUC 2004: 74-84 |
| 2 |  | Cheol Hong Kim,
Sung-Hoon Shim,
Jong Wook Kwak,
Chu Shik Jhon:
A Novel Approach to Improve Cache Performance in Ring-Based Multiprocessors.
PDPTA 2004: 519-524 |
| 1 |  | Jong Wook Kwak,
Hyunbae Lee,
Cheol Hong Kim,
Sung-Hoon Shim,
Chu Shik Jhon:
Level 1 & Victim Cache Management with Processor Reuse Information.
PDPTA 2004: 694-698 |