Vijay Khawshe

	2010
3		Kunal Desai, Rajasekhar Nagulapalli, Vijay Krishna, Rajkumar Palwai, Pravin Kumar Venkatesan, Vijay Khawshe: High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique. VLSI Design 2010: 300-305
	2009
2		Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar: A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. VLSI Design 2009: 373-378
	2007
1		Vijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin K. Mishra, Abhijit Abhyankar: A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL. VLSI Design 2007: 141-145

Coauthor Index

1	Abhijit Abhyankar	[1] [2]
2	Kunal Desai	[2] [3]
3	Prateek Goyal	[2]
4	Manish Jain	[1]
5	Vijay Krishna	[2] [3]
6	Pravin V. Kumar	[1]
7	Mahabaleshwara	[1]
8	Navin K. Mishra	[1]
9	Rajasekhar Nagulapalli	[3]
10	Rajkumar Palwai	[2] [3]
11	Kashinath Prabhu	[2]
12	Kashi Prabu	[1]
13	Leneesh Raghavan	[2]
14	Renu Rangnekar	[1] [2]
15	M. Thrivikraman	[2]
16	Pravin Kumar Venkatesan	[2] [3]
17	Kapil Vyas	[1] [2]

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