F. Kharbash

	2007
4		F. Kharbash, G. M. Chaudhry: The performance of parallel prefix adders on nanometer FPGA. ISCA PDCS 2007: 280-284
3		F. Kharbash, G. M. Chaudhry: QSDN: Quantum-dot cellular automata signed digit number adder. ISCA PDCS 2007: 285-289
2		F. Kharbash, G. M. Chaudhry: Reliable Binary Signed Digit Number Adder Design. ISVLSI 2007: 479-484
	2006
1		F. Kharbash, G. M. Chaudhry: High-Speed Redundant Modulo 2n-1 Adder. AICCSA 2006: 80-87

Coauthor Index

1

G. M. Chaudhry

[1] [2] [3] [4]

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