Lounis Kessal

	2011
15		Laurent Gantel, Amer Khiar, Benoit Miramond, Mohamed El Amine Benkhelifa, Fabrice Lemonnier, Lounis Kessal: Dataflow programming model for reconfigurable computing. ReCoSoC 2011: 1-8
	2009
14		Sonia Khatchadourian, Jean-Christophe Prévotet, Lounis Kessal: Hardware Architecture for Pattern Recognition in Gamma-Ray Experiment. EURASIP J. Emb. Sys. 2009: (2009)
	2008
13		Narayanan Ramanan, Sonia Khatchadourian, Jean-Christophe Prévotet, Lounis Kessal: Neural network hardware architecture for pattern recognition in the HESS2 project. ESANN 2008: 343-348
12		Lounis Kessal, Nicolas Abel, Si Mahmoud Karabernou, Didier Demigny: Reconfigurable computing: design methodology and hardware tasks scheduling for real-time image processing. J. Real-Time Image Processing 3(3): 131-147 (2008)
	2007
11		Si Mahmoud Karabernou, Lounis Kessal, Fayçal Terranti: Erratum to "Real-time FPGA implementation of Hough Transform using gradient and CORDIC algorithm" [Image and Vision Computing 23 (2005) 1009-1017]. Image Vision Comput. 25(6): 1032 (2007)
	2006
10		Nicolas Abel, Lounis Kessal, Sébastien Pillement, Didier Demigny: Clear Stream towards Dynamically Reconfigurable Systems on Chip. ReCoSoC 2006: 98-104
	2004
9		Nicolas Abel, Lounis Kessal, Didier Demigny: Design flexibility using fpga dynamical reconfiguration. ICIP 2004: 2821-2824
	2003
8		Lounis Kessal, Nicolas Abel, Didier Demigny: Real-time image processing with dynamically reconfigurable architecture. Real-Time Imaging 9(5): 297-313 (2003)
	2001
7		P. Lamaty, B. Mazar, Didier Demigny, Lounis Kessal, Si Mahmoud Karabernou: Two ASIC for Low and Middle Levels of Real Time Image Processing. VLSI-SOC 2001: 3-14
6		Didier Demigny, Lounis Kessal, J. Pons: Fast Recursive Implementation of the Gaussian Filter. VLSI-SOC 2001: 39-49
5		Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, Si Mahmoud Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86
	2000
4		Didier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani: How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? CAMP 2000: 240-
3		Lounis Kessal, Didier Demigny, N. Boudouani, R. Bourguiba: Reconfigurable Hardware for Real Time Image Processing. ICIP 2000
	1997
2		F. G. Lorca, Lounis Kessal, Didier Demigny: Efficient ASIC and FPGA Implementations of IIR Filters for Real Time Edge Detection. ICIP (2) 1997: 406-409
	1995
1		Didier Demigny, F. G. Lorca, Lounis Kessal: Evaluation of edge detectors performances with a discrete expression of Canny's criteria. ICIP 1995: 2169-2172

Coauthor Index

1	Nicolas Abel	[8] [9] [10] [12]
2	Mohamed El Amine Benkhelifa	[15]
3	N. Boudouani	[3] [4] [5]
4	R. Bourguiba	[3] [4] [5]
5	Didier Demigny	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12]
6	Laurent Gantel	[15]
7	Si Mahmoud Karabernou	[5] [7] [11] [12]
8	Sonia Khatchadourian	[13] [14]
9	Amer Khiar	[15]
10	P. Lamaty	[7]
11	Fabrice Lemonnier	[15]
12	F. G. Lorca	[1] [2]
13	B. Mazar	[7]
14	Benoit Miramond	[15]
15	Sébastien Pillement	[10]
16	J. Pons	[6]
17	Jean-Christophe Prévotet	[13] [14]
18	Narayanan Ramanan	[13]
19	Fayçal Terranti	[11]

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