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| 2011 | ||
|---|---|---|
| 44 | Carl Gray, David C. Keezer, H. Wang, Keren Bergman: Burst-Mode Transmission and Data Recovery for Multi-GHz Optical Packet Switching Network Testing. Asian Test Symposium 2011: 545-551 | |
| 43 | David C. Keezer, Carl Edward Gray: Two methods for 24 Gbps test signal synthesis. DATE 2011: 579-582 | |
| 42 | A. M. Majid, David C. Keezer: Multi-function multi-GHz ATE extension using state-of-the-art FPGAs. ITC 2011: 1-10 | |
| 41 | Carl Edward Gray, David C. Keezer: Extending a DWDM Optical Network Test System to 12 Gbps x4 Channels. J. Electronic Testing 27(3): 351-361 (2011) | |
| 2010 | ||
| 40 | A. M. Majid, David C. Keezer: Stretching the limits of FPGA SerDes for enhanced ATE performance. DATE 2010: 202-207 | |
| 39 | Marcus Dutton, David C. Keezer: An architecture for graphics processing in an FPGA (abstract only). FPGA 2010: 283 | |
| 38 | David C. Keezer, Carl Gray, Dany Minier, Patrice Ducharme: Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic. J. Electronic Testing 26(1): 87-96 (2010) | |
| 2009 | ||
| 37 | David C. Keezer, Carl Gray, A. M. Majid, Dany Minier, Patrice Ducharme: A development platform and electronic modules for automated test up to 20 Gbps. ITC 2009: 1-11 | |
| 2008 | ||
| 36 | David C. Keezer, Dany Minier, Patrice Ducharme: Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications. DATE 2008: 1486-1491 | |
| 35 | David C. Keezer, Dany Minier, Patrice Ducharme, A. M. Majid: An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test. ITC 2008: 1-9 | |
| 34 | David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop: MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing. VLSI Design 2008: (2008) | |
| 2007 | ||
| 33 | David C. Keezer, Dany Minier, Patrice Ducharme: Method for reducing jitter in multi-gigahertz ATE. DATE 2007: 701-706 | |
| 32 | David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop: Multi-GHz loopback testing using MEMs switches and SiGe logic. ITC 2007: 1-10 | |
| 31 | Carl Edward Gray, Odile Liboiron-Ladouceur, David C. Keezer, Keren Bergman: Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network. ITC 2007: 1-9 | |
| 30 | David C. Keezer, Carl Gray, A. M. Majid, N. Taher: Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL CoRR abs/0710.4761: (2007) | |
| 2006 | ||
| 29 | A. M. Majid, David C. Keezer, Jayasanker Jayabalan, Mihai Rotaru: Multi-Gigahertz Testing of Wafer-Level Packaged Devices. ITC 2006: 1-10 | |
| 28 | David C. Keezer, Dany Minier, Patrice Ducharme: Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. IEEE Design & Test of Computers 23(1): 46-57 (2006) | |
| 2005 | ||
| 27 | A. M. Majid, David C. Keezer, J. V. Karia: A 5 Gbps Wafer-Level Tester. Asian Test Symposium 2005: 58-63 | |
| 26 | David C. Keezer, Carl Gray, A. M. Majid, N. Taher: Low-Cost Multi-Gigahertz Test Systems Using CMOS FPGAs and PECL. DATE 2005: 152-157 | |
| 2004 | ||
| 25 | David C. Keezer, Dany Minier, F. Binette: Modular Extension of ATE to 5 Gbps. ITC 2004: 748-757 | |
| 24 | David C. Keezer, Dany Minier, Marie-Christine Caron: Multiplexing ATE Channels for Production Testing at 2.5 Gbps. IEEE Design & Test of Computers 21(4): 288-301 (2004) | |
| 2003 | ||
| 23 | J. S. Davis, David C. Keezer, Odile Liboiron-Ladouceur, Keren Bergman: Application and Demonstration of a Digital Test Core: Optoelectronic Test Bed and Wafer-level Prober. ITC 2003: 166-174 | |
| 22 | David C. Keezer, Dany Minier, Marie-Christine Caron: A Production-Oriented Multiplexing System for Testing above 2.5 Gbps. ITC 2003: 191-200 | |
| 2002 | ||
| 21 | David C. Keezer: Challenges and Solutions for Multi-Gigahertz Testing. ITC 2002: 1230 | |
| 20 | J. S. Davis, David C. Keezer: Multi-Purpose Digital Test Core Utilizing Programmable Logic. ITC 2002: 438-445 | |
| 19 | Karim Arabi, Klaus-Dieter Hilliges, David C. Keezer, Sassan Tabatabaei: Multi-GigaHertz Testing Challenges and Solutions. VTS 2002: 265-268 | |
| 2001 | ||
| 18 | David C. Keezer, Q. Zhou, C. Bair, J. Kuan, B. Poole: Terabit-per-second automated digital testing. ITC 2001: 1143-1151 | |
| 1999 | ||
| 17 | David C. Keezer, Q. Zhou: Test support processors for enhanced testability of high performance circuits. ITC 1999: 801-809 | |
| 1998 | ||
| 16 | David C. Keezer, K. E. Newman, J. S. Davis: Improved sensitivity for parallel test of substrate interconnections. ITC 1998: 228-233 | |
| 15 | Bruce C. Kim, David C. Keezer, Abhijit Chatterjee: A high throughput test methodology for MCM substrates. ITC 1998: 234-240 | |
| 14 | David C. Keezer, Q. Zhou: Alternative interface methods for testing high speed bidirectional signals. ITC 1998: 824-830 | |
| 1997 | ||
| 13 | K. E. Newman, David C. Keezer: A Low-Cost Massively-Parallel Interconnect Test Method for MCM Substrates. ITC 1997: 370-378 | |
| 12 | David C. Keezer, R. J. Wenzel: Low-Cost ATE PinElectronics for Multigigabit-per-Second At-Speed Test. ITC 1997: 94-100 | |
| 1995 | ||
| 11 | David C. Keezer: Electrical Troubleshooting, Diagnostics, and Repair of Multichip Modules. ITC 1995: 917 | |
| 1993 | ||
| 10 | N. Ranganathan, Raghu Sastry, R. Venkatesan, Joseph W. Yoder, David C. Keezer: SMAC: A Scene Matching Chip. ICCD 1993: 184-187 | |
| 9 | David C. Keezer: Known Godd Die for MCMs: Enabling Technologies. ITC 1993: 266 | |
| 1992 | ||
| 8 | David C. Keezer: MCM Test Using Available Technology. ITC 1992: 253 | |
| 7 | David C. Keezer, R. J. Wenzel: Calibration Techniques for a Gigahertz Test System. ITC 1992: 530-537 | |
| 6 | Vijay K. Jain, Hiroomi Hikawa, David C. Keezer: An Architecture for WSI Rapid Prototyping. IEEE Computer 25(4): 71-75 (1992) | |
| 1991 | ||
| 5 | S. P. Athan, David C. Keezer, J. McKinley: High Frequency Wafer Probing and Power Supply Resonance Effects. ITC 1991: 1069-1078 | |
| 4 | David C. Keezer: Real-Time Data Comparison for GigaHertz Digital Test. ITC 1991: 790-797 | |
| 3 | Vijay K. Jain, David L. Landis, David C. Keezer, K. T. Wilson, D. Whittaker: Wafer Scale Integration: A university perspective. VLSI Signal Processing 2(4): 253-269 (1991) | |
| 1990 | ||
| 2 | David C. Keezer: Multiplexing test system channels for data rates above 1 Gb/s. ITC 1990: 362-368 | |
| 1985 | ||
| 1 | L. J. Falkenstrom, David C. Keezer, A. Patterson, Robert M. Rolfe, J. Wolcott: Tester Independent Support Software System (TISSS). ITC 1985: 685-691 | |
Colors in the list of coauthors
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