 | 2012 |
| 6 |  | Hojin Kee,
Chung-Ching Shen,
Shuvra S. Bhattacharyya,
Ian Wong,
Yong Rao,
Jacob Kornerup:
Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware.
Signal Processing Systems 66(3): 285-301 (2012) |
| 2011 |
| 5 |  | Nimish Sane,
Hojin Kee,
Gunasekaran Seetharaman,
Shuvra S. Bhattacharyya:
Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs.
Signal Processing Systems 65(2): 229-244 (2011) |
| 2010 |
| 4 |  | Hojin Kee,
Shuvra S. Bhattacharyya,
Ian Wong,
Yong Rao:
FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques.
ICASSP 2010: 1510-1513 |
| 3 |  | Hojin Kee,
Shuvra S. Bhattacharyya,
Jacob Kornerup:
Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs.
ICSAMOS 2010: 136-143 |
| 2 |  | Hsiang-Huang Wu,
Hojin Kee,
Nimish Sane,
William Plishker,
Shuvra S. Bhattacharyya:
Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs.
International Symposium on Rapid System Prototyping 2010: 1-7 |
| 2008 |
| 1 |  | Hojin Kee,
Newton Petersen,
Jacob Kornerup,
Shuvra S. Bhattacharyya:
Systematic generation of FPGA-based FFT implementations.
ICASSP 2008: 1413-1416 |