Stephen W. Keckler

	2012
68		Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron: A Hierarchical Thread Scheduler and Register File for Energy-Efficient Throughput Processors. ACM Trans. Comput. Syst. 30(2): 8 (2012)
	2011
67		Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler: Exploiting criticality to reduce bottlenecks in distributed uniprocessors. HPCA 2011: 431-442
66		Mark Gebhart, Daniel R. Johnson, David Tarjan, Stephen W. Keckler, William J. Dally, Erik Lindholm, Kevin Skadron: Energy-efficient mechanisms for managing thread context in throughput processors. ISCA 2011: 235-246
65		Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu: Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees. ISCA 2011: 401-412
64		Jeffrey R. Diamond, Martin Burtscher, John D. McCalpin, Byoung-Do Kim, Stephen W. Keckler, James C. Browne: Evaluation and optimization of multicore performance bottlenecks in supercomputing applications. ISPASS 2011: 32-43
63		Mark Gebhart, Stephen W. Keckler, William J. Dally: A compile-time managed multi-level register file hierarchy. MICRO 2011: 465-476
62		Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco: GPUs and the Future of Parallel Computing. IEEE Micro 31(5): 7-17 (2011)
	2010
61		Boris Grot, Stephen W. Keckler, Onur Mutlu: Topology-Aware Quality-of-Service Support in Highly Integrated Chip Multiprocessors. ISCA Workshops 2010: 357-375
	2009
60		Stephen W. Keckler, Luiz André Barroso: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA ACM 2009
59		Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley: An evaluation of the TRIPS computer system. ASPLOS 2009: 1-12
58		Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu: Express Cube Topologies for on-Chip Interconnects. HPCA 2009: 163-174
57		Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger: End-to-end validation of architectural power models. ISLPED 2009: 383-388
56		Nitya Ranganathan, Doug Burger, Stephen W. Keckler: Analysis of the TRIPS prototype block predictor. ISPASS 2009: 195-206
55		Boris Grot, Stephen W. Keckler, Onur Mutlu: Preemptive virtual clock: a flexible, efficient, and cost-effective QOS scheme for networks-on-chip. MICRO 2009: 268-279
	2008
54		Paul Gratz, Boris Grot, Stephen W. Keckler: Regional congestion awareness for load balance in networks-on-chip. HPCA 2008: 203-214
53		Franziska Roesner, Doug Burger, Stephen W. Keckler: Counting Dependence Predictors. ISCA 2008: 215-226
52		Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible-core chip multiprocessors. PACT 2008: 187-196
51		Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger: High performance dense linear algebra on a spatially distributed processor. PPOPP 2008: 63-72
50		Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger: Multitasking workload scheduling on flexible core chip multiprocessors. SIGARCH Computer Architecture News 36(2): 46-55 (2008)
	2007
49		Michael T. Clark, Peter Hofstee, Edward J. Barragy, Ian Buck, Stephen W. Keckler: The future of multi-core technologies. CLUSTER 2007
48		Heather Hanson, Stephen W. Keckler, Karthick Rajamani, Soraya Ghiasi, Freeman L. Rawson III, Juan Rubio: Power, Performance, and Thermal Management for High-Performance Systems. IPDPS 2007: 1-8
47		Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler: Late-binding: enabling unordered load-store queues. ISCA 2007: 347-357
46		Heather Hanson, Stephen W. Keckler, Soraya Ghiasi, Karthick Rajamani, Freeman L. Rawson III, Juan Rubio: Thermal response to DVFS: analysis with an Intel Pentium M. ISLPED 2007: 219-224
45		Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler: Composable Lightweight Processors. MICRO 2007: 381-394
44		Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS 2007: 7-17
43		Jayaram Mudigonda, Harrick M. Vin, Stephen W. Keckler: Reconciling performance and programmability in networking systems. SIGCOMM 2007: 73-84
42		Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007)
41		John D. Owens, William J. Dally, Ron Ho, D. N. Jayasimha, Stephen W. Keckler, Li-Shiuan Peh: Research Challenges for On-Chip Interconnection Networks. IEEE Micro 27(5): 96-108 (2007)
40		Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distrib. Syst. 18(8): 1028-1040 (2007)
	2006
39		Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler: Design and Implementation of the TRIPS Primary Memory System. ICCD 2006
38		Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger: Implementation and Evaluation of On-Chip Network Architectures. ICCD 2006
37		Kartik K. Agaram, Stephen W. Keckler, Calvin Lin, Kathryn S. McKinley: Decomposing memory performance: data structures and phases. ISMM 2006: 95-103
36		Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler: Critical path analysis of the TRIPS architecture. ISPASS 2006: 37-47
35		Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger: Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491
34		Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley: Dataflow Predication. MICRO 2006: 89-102
	2005
33		Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler: A NUCA substrate for flexible CMP cache sharing. ICS 2005: 31-40
	2004
32		Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler: Scalable selective re-execution for EDGE architectures. ASPLOS 2004: 120-132
31		Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler: Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. IEEE PACT 2004: 74-84
30		Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode: Scaling to the End of Silicon with EDGE Architectures. IEEE Computer 37(7): 44-55 (2004)
29		Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High-ILP Processors. IEEE Micro 24(6): 118-127 (2004)
28		Doug Burger, Todd M. Austin, Stephen W. Keckler: Recent extensions to the SimpleScalar tool suite. SIGMETRICS Performance Evaluation Review 31(4): 4-7 (2004)
27		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore: TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. TACO 1(1): 62-93 (2004)
	2003
26		Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger: Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD 2003: 170-
25		Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger: Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD 2003: 481-488
24		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433
23		Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger: Microprocessor pipeline energy analysis. ISLPED 2003: 282-287
22		Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger: Universal Mechanisms for Data-Parallel Architectures. MICRO 2003: 303-314
21		Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler: Scalable Hardware Memory Disambiguation for High ILP Processors. MICRO 2003: 399-410
20		Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore: Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003)
19		Changkyu Kim, Doug Burger, Stephen W. Keckler: Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro 23(6): 99-107 (2003)
18		Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static energy reduction techniques for microprocessor caches. IEEE Trans. VLSI Syst. 11(3): 303-313 (2003)
	2002
17		Changkyu Kim, Doug Burger, Stephen W. Keckler: An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS 2002: 211-222
16		Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi: Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN 2002: 389-398
15		M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas: The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA 2002: 14-24
14		Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, José-Lorenzo Cruz, Fernando Latorre, Antonio González, Mateo Valero: Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Computer Architecture News 30(1): 2-4 (2002)
	2001
13		Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger: Static Energy Reduction Techniques for Microprocessor Caches. ICCD 2001: 276-283
12		Jaehyuk Huh, Doug Burger, Stephen W. Keckler: Exploring the Design Space of Future CMPs. IEEE PACT 2001: 199-210
11		Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler: A design space evaluation of grid processor architectures. MICRO 2001: 40-51
	2000
10		Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger: Clock rate versus IPC: the end of the road for conventional microarchitectures. ISCA 2000: 248-259
9		Nicholas P. Carter, William J. Dally, Whay Sing Lee, Stephen W. Keckler, Andrew Chang: Processor Mechanisms for Software Shared Memory. ISHPC 2000: 120-133
8		Daniel A. Jiménez, Stephen W. Keckler, Calvin Lin: The impact of delay on the design of branch predictors. MICRO 2000: 67-76
	1999
7		Stephen W. Keckler, Andrew Chang, Whay Sing Lee, Sandeep Chatterjee, William J. Dally: Concurrent Event Handling through Multithreading. IEEE Trans. Computers 48(9): 903-916 (1999)
	1998
6		Stephen W. Keckler, William J. Dally, Daniel Maskit, Nicholas P. Carter, Andrew Chang, Whay Sing Lee: Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor. ISCA 1998: 306-317
5		Whay Sing Lee, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Andrew Chang: An Efficient, Protected Message Interface. IEEE Computer 31(11): 69-75 (1998)
	1997
4		Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay Sing Lee: The M-machine multicomputer. International Journal of Parallel Programming 25(3): 183-212 (1997)
	1995
3		Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay Sing Lee: The M-Machine multicomputer. MICRO 1995: 146-156
	1994
2		Nicholas P. Carter, Stephen W. Keckler, William J. Dally: Hardware Support for Fast Capability-based Addressing. ASPLOS 1994: 319-327
	1992
1		Stephen W. Keckler, William J. Dally: Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism. ISCA 1992: 202-213

Coauthor Index

1	Kartik K. Agaram	[37]
2	Vikas Agarwal	[10] [13] [18]
3	Lorenzo Alvisi	[16]
4	Todd M. Austin	[28]
5	Edward J. Barragy	[49]
6	Luiz André Barroso	[60]
7	James C. Browne	[64]
8	Ian Buck	[49]
9	Doug Burger	[10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [38] [39] [40] [42] [44] [45] [47] [50] [51] [52] [53] [56] [57] [59] [67]
10	James H. Burrill	[30] [59]
11	Martin Burtscher	[64]
12	Nicholas P. Carter	[2] [3] [4] [5] [6] [9]
13	Andrew Chang	[3] [4] [5] [6] [7] [9]
14	Sandeep Chatterjee	[7]
15	Xia Chen	[36]
16	Michael T. Clark	[49]
17	Katherine E. Coons	[59]
18	José-Lorenzo Cruz	[14]
19	Michael Dahlin	[30]
20	William J. Dally	[1] [2] [3] [4] [5] [6] [7] [9] [41] [62] [63] [66] [68]
21	Rajagopalan Desikan	[14] [21] [29] [32] [35] [39]
22	Jeffrey R. Diamond	[51] [59] [64]
23	Saurabh Drolia	[35]
24	Joel S. Emer	[47]
25	Keith I. Farkas	[15]
26	Marco Fillo	[3] [4]
27	Michael Garland	[62]
28	Mark Gebhart	[59] [63] [66] [68]
29	Robert A. van de Geijn	[51]
30	Soraya Ghiasi	[46] [48]
31	David Glasco	[62]
32	Antonio González	[14]
33	Kazushige Goto	[51]
34	Madhu Saravana Sibi Govindan (M. S. Govindan)	[35] [45] [57] [67]
35	Paul Gratz (Paul V. Gratz)	[35] [38] [42] [44] [54] [59]
36	Boris Grot	[54] [55] [58] [61] [65]
37	Divya Gulati	[35] [45] [50] [52]
38	Yevgeny Gurevich	[3] [4]
39	Heather Hanson	[13] [18] [23] [35] [42] [44] [46] [48]
40	Joel Hestness	[58] [65]
41	Ron Ho (Ronald Ho)	[41]
42	Peter Hofstee	[49]
43	M. S. Hrishikesh	[10] [13] [15] [18]
44	Jaehyuk Huh	[12] [20] [24] [27] [33] [40]
45	D. N. Jayasimha	[41]
46	Daniel A. Jiménez	[8]
47	Lizy Kurian John (Lizy K. John)	[30]
48	Daniel R. Johnson	[66] [68]
49	Norman P. Jouppi	[15]
50	Brucek Khailany	[62]
51	Byoung-Do Kim	[64]
52	Changkyu Kim	[17] [19] [20] [24] [27] [33] [35] [38] [40] [42] [45] [50] [52]
53	Michael Kistler	[16]
54	Sundeep K. Kushwaha	[31]
55	Fernando Latorre	[14]
56	Whay Sing Lee	[3] [4] [5] [6] [7] [9]
57	Calvin Lin	[8] [30] [31] [37]
58	Erik Lindholm	[66] [68]
59	Haiming Liu	[20] [24] [27] [35]
60	Bertrand A. Maher	[59]
61	Mario Marino	[59]
62	William R. Mark	[22]
63	Daniel Maskit	[6]
64	John D. McCalpin	[64]
65	Robert G. McDonald	[27] [30] [34] [35] [36] [38] [39] [44]
66	Kathryn S. McKinley	[30] [31] [34] [37] [59]
67	Charles R. Moore	[20] [21] [23] [24] [25] [27] [29] [30]
68	Jayaram Mudigonda	[43]
69	Onur Mutlu	[55] [58] [61] [65]
70	Ramadass Nagarajan	[11] [20] [24] [27] [31] [34] [35] [36]
71	Karthik Natarajan	[23]
72	John D. Owens	[41]
73	Li-Shiuan Peh	[41]
74	Karthick Rajamani	[46] [48]
75	Nitya Ranganathan	[27] [35] [45] [56] [59]
76	Freeman L. Rawson III	[46] [48]
77	Behnam Robatmili	[51] [59] [67]
78	Franziska Roesner	[47] [53]
79	Juan C. Rubio (Juan Rubio)	[46] [48]
80	Karthikeyan Sankaralingam	[11] [20] [22] [24] [26] [27] [34] [35] [42] [44]
81	Simha Sethumadhavan	[21] [29] [32] [35] [39] [45] [47] [50] [52]
82	Hazim Shafi	[33] [40]
83	Sadia Sharif	[35]
84	Premkishore Shivakumar	[15] [16] [25] [35] [42] [44]
85	Vincent Ajay Singh	[26]
86	Kevin Skadron	[66] [68]
87	Aaron Smith	[34] [59]
88	David Tarjan	[66] [68]
89	Mateo Valero	[14]
90	Harrick M. Vin	[43]
91	William Yode	[30]
92	Lixin Zhang	[33] [40]

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page