John Keane

Intel

other persons with the same name:

• John Keane - Norkom Technologies

	2011
16		John Keane, S. Venkatraman, Paulo F. Butzen, Chris H. Kim: An Array-Based Test Circuit for Fully Automated Gate Dielectric Breakdown Characterization. IEEE Trans. VLSI Syst. 19(5): 787-795 (2011)
15		John Keane, Wei Zhang, Chris H. Kim: An Array-Based Odometer System for Statistically Significant Circuit Aging Characterization. J. Solid-State Circuits 46(10): 2374-2385 (2011)
	2010
14		John Keane, Tae-Hyoung Kim, Chris H. Kim: An On-Chip NBTI Sensor for Measuring pMOS Threshold Voltage Degradation. IEEE Trans. VLSI Syst. 18(6): 947-956 (2010)
13		John Keane, Xiaofei Wang, Devin Persaud, Chris H. Kim: An All-In-One Silicon Odometer for Separately Monitoring HCI, BTI, and TDDB. J. Solid-State Circuits 45(4): 817-829 (2010)
12		John Keane, Tae-Hyoung Kim, Xiaofei Wang, Chris H. Kim: On-chip reliability monitors for measuring circuit degradation. Microelectronics Reliability 50(8): 1039-1053 (2010)
	2009
11		Jie Gu, John Keane, Chris H. Kim: Fuer Chris H. Kim 2 Eintraege in Db, Chris H. Kim und Chris Kim. Identisch. Siehe EE-Links: Univ. of Minnesota. Modeling, Analysis, and Application of Leakage Induced Damping Effect for Power Supply Integrity. IEEE Trans. VLSI Syst. 17(1): 128-136 (2009)
10		Jie Gu, Hanyong Eom, John Keane, Chris H. Kim: Sleep Transistor Sizing and Adaptive Control for Supply Noise Minimization Considering Resonance. IEEE Trans. VLSI Syst. 17(9): 1203-1211 (2009)
	2008
9		Tae-Hyoung Kim, Jason Liu, John Keane, Chris H. Kim: Circuit techniques for ultra-low power subthreshold SRAMs. ISCAS 2008: 2574-2577
8		Pulkit Jain, Tae-Hyoung Kim, John Keane, Chris H. Kim: A multi-story power delivery technique for 3D integrated circuits. ISLPED 2008: 57-62
7		Jie Gu, John Keane, Sachin S. Sapatnekar, Chris H. Kim: Statistical Leakage Estimation of Double Gate FinFET Devices Considering the Width Quantization Property. IEEE Trans. VLSI Syst. 16(2): 206-209 (2008)
6		John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S. Sapatnekar, Chris H. Kim: Stack Sizing for Optimal Current Drivability in Subthreshold Circuits. IEEE Trans. VLSI Syst. 16(5): 598-602 (2008)
	2007
5		John Keane, Tae-Hyoung Kim, Chris H. Kim: An on-chip NBTI sensor for measuring PMOS threshold voltage degradation. ISLPED 2007: 189-194
4		Tae-Hyoung Kim, John Keane, Hanyong Eom, Chris H. Kim: Utilizing Reverse Short-Channel Effect for Optimal Subthreshold Circuit Design. IEEE Trans. VLSI Syst. 15(7): 821-829 (2007)
	2006
3		John Keane, Hanyong Eom, Tae-Hyoung Kim, Sachin S. Sapatnekar, Chris H. Kim: Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing. DAC 2006: 425-428
2		Tae-Hyoung Kim, Hanyong Eom, John Keane, Chris H. Kim: Utilizing reverse short channel effect for optimal subthreshold circuit design. ISLPED 2006: 127-130
1		Jie Gu, John Keane, Chris H. Kim: Modeling and analysis of leakage induced damping effect in low voltage LSIs. ISLPED 2006: 382-387

Coauthor Index

1	Paulo F. Butzen	[16]
2	Hanyong Eom	[2] [3] [4] [6] [10]
3	Jie Gu	[1] [7] [10] [11]
4	Pulkit Jain	[8]
5	Chris H. Kim	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
6	Tae-Hyoung Kim	[2] [3] [4] [5] [6] [8] [9] [12] [14]
7	Jason Liu	[9]
8	Devin Persaud	[13]
9	Sachin S. Sapatnekar	[3] [6] [7]
10	S. Venkatraman	[16]
11	Xiaofei Wang	[12] [13]
12	Wei Zhang	[15]

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