Wuudiann Ke

	1996
10		Wuudiann Ke: Hybrid Pin Control Using Boundary-Scan And Its Applications. Asian Test Symposium 1996: 44-49
9		Wuudiann Ke: Backplane Interconnect Test in a Boundary-Scan Environment. ITC 1996: 717-724
	1995
8		Wuudiann Ke, Duy Le, Najmi T. Jarwala: A Secure Data Transmission Scheme for 1149.1 Backplane Test Bus. ITC 1995: 789-796
7		Wuudiann Ke, Premachandran R. Menon: Multifault testability of delay-testable circuits. VTS 1995: 400-409
6		Wuudiann Ke, Premachandran R. Menon: Synthesis of Delay-Verifiable Combinational Circuits. IEEE Trans. Computers 44(2): 213-222 (1995)
5		Wuudiann Ke, Premachandran R. Menon: Path-delay-fault testable nonscan sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 576-582 (1995)
4		Wuudiann Ke, Premachandran R. Menon: Delay-testable implementations of symmetric functions. IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 772-775 (1995)
3		Wuudiann Ke, Premachandran R. Menon: Multifault and delay-fault testability of multilevel circuits. J. Electronic Testing 6(3): 333-336 (1995)
	1994
2		Wuudiann Ke, Premachandran R. Menon: Synthesis of Delay-Verifiable Two-Level Circuits. EDAC-ETC-EUROASIC 1994: 297-301
1		Wuudiann Ke, Premachandran R. Menon: Delay-Verifiability of Combinational Circuits Based on Primitive Faults. ICCD 1994: 86-90

Coauthor Index

1	Najmi T. Jarwala	[8]
2	Duy Le	[8]
3	Premachandran R. Menon	[1] [2] [3] [4] [5] [6] [7]

Colors in the list of coauthors

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