 | 2011 |
| 44 |  | Xrysovalantis Kavousianos,
Krishnendu Chakrabarty,
Arvind Jain,
Rubin A. Parekhji:
Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands.
Asian Test Symposium 2011: 33-39 |
| 43 |  | Vasileios Tenentes,
Xrysovalantis Kavousianos:
Low Power Test-Compression for High Test-Quality and Low Test-Data Volume.
Asian Test Symposium 2011: 46-53 |
| 42 |  | Zhaobo Zhang,
Xrysovalantis Kavousianos,
Yan Luo,
Yiorgos Tsiatouhas,
Krishnendu Chakrabarty:
Signature Analysis for Testing, Diagnosis, and Repair of Multi-mode Power Switches.
European Test Symposium 2011: 13-18 |
| 41 |  | Vasileios Tenentes,
Xrysovalantis Kavousianos:
Test-data volume and scan-power reduction with low ATE interface for multi-core SoCs.
ICCAD 2011: 747-754 |
| 40 |  | Zhaobo Zhang,
Xrysovalantis Kavousianos,
Yiorgos Tsiatouhas,
Krishnendu Chakrabarty:
A BIST scheme for testing and repair of multi-mode power switches.
IOLTS 2011: 115-120 |
| 39 |  | Zhaobo Zhang,
Xrysovalantis Kavousianos,
Krishnendu Chakrabarty,
Yiorgos Tsiatouhas:
A Robust and Reconfigurable Multi-mode Power Gating Architecture.
VLSI Design 2011: 280-285 |
| 38 |  | Xrysovalantis Kavousianos,
Vasileios Tenentes,
Krishnendu Chakrabarty,
Emmanouil Kalligeros:
Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets.
IEEE Trans. VLSI Syst. 19(12): 2330-2335 (2011) |
| 37 |  | Xrysovalantis Kavousianos,
Krishnendu Chakrabarty:
Generation of Compact Stuck-At Test Sets Targeting Unmodeled Defects.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(5): 787-791 (2011) |
| 2010 |
| 36 |  | Xrysovalantis Kavousianos,
Krishnendu Chakrabarty,
Emmanouil Kalligeros,
Vasileios Tenentes:
Defect Coverage-Driven Window-Based Test Compression.
Asian Test Symposium 2010: 141-146 |
| 35 |  | S. Balatsouka,
Vasileios Tenentes,
Xrysovalantis Kavousianos,
Krishnendu Chakrabarty:
Defect aware X-filling for low-power scan testing.
DATE 2010: 873-878 |
| 34 |  | Vasileios Tenentes,
Xrysovalantis Kavousianos:
Self-Freeze Linear Decompressors for Low Power Testing.
ISVLSI 2010: 63-68 |
| 33 |  | Vasileios Tenentes,
Xrysovalantis Kavousianos,
Emmanouil Kalligeros:
Single and Variable-State-Skip LFSRs: Bridging the Gap Between Test Data Compression and Test Set Embedding for IP Cores.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(10): 1640-1644 (2010) |
| 2009 |
| 32 |  | Xrysovalantis Kavousianos,
Krishnendu Chakrabarty:
Generation of compact test sets with high defect coverage.
DATE 2009: 1130-1135 |
| 31 |  | M. Koutsoupia,
Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
LFSR-based test-data compression with self-stoppable seeds.
DATE 2009: 1482-1487 |
| 30 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
Efficient partial scan cell gating for low-power scan-based testing.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
| 2008 |
| 29 |  | Vasileios Tenentes,
Xrysovalantis Kavousianos,
Emmanouil Kalligeros:
State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores.
DATE 2008: 474-479 |
| 28 |  | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains.
IEEE Trans. VLSI Syst. 16(7): 926-931 (2008) |
| 27 |  | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Test Data Compression Based on Variable-to-Variable Huffman Encoding With Codeword Reusability.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1333-1338 (2008) |
| 2007 |
| 26 |  | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Optimal Selective Huffman Coding for Test-Data Compression.
IEEE Trans. Computers 56(8): 1146-1152 (2007) |
| 25 |  | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Multilevel Huffman Coding: An Efficient Test-Data Compression Method for IP Cores.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1070-1083 (2007) |
| 2006 |
| 24 |  | Xrysovalantis Kavousianos,
Emmanouil Kalligeros,
Dimitris Nikolos:
Efficient test-data compression for IP cores using multilevel Huffman coding.
DATE 2006: 1033-1038 |
| 23 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Efficient Multiphase Test Set Embedding for Scan-based Testing.
ISQED 2006: 433-438 |
| 2005 |
| 22 |  | Emmanouil Kalligeros,
D. Kaseridis,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Reseeding-Based Test Set Embedding with Reduced Test Sequences.
ISQED 2005: 226-231 |
| 2004 |
| 21 |  | Maciej Bellos,
Dimitris Bakalis,
Dimitris Nikolos,
Xrysovalantis Kavousianos:
Low Power Testing by Test Vector Ordering with Vector Repetition.
ISQED 2004: 205-210 |
| 20 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Maciej Bellos,
Dimitris Nikolos:
An Efficient Test Vector Ordering Method for Low Power Testing.
ISVLSI 2004: 285-288 |
| 19 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Multiphase BIST: a new reseeding technique for high test-data compression.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1429-1446 (2004) |
| 2003 |
| 18 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
A highly regular multi-phase reseeding technique for scan-based BIST.
ACM Great Lakes Symposium on VLSI 2003: 295-298 |
| 17 |  | Giorgos Dimitrakopoulos,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
Virtual-scan: a novel approach for software-based self-testing of microprocessors.
ISCAS (5) 2003: 237-240 |
| 16 |  | Maciej Bellos,
Xrysovalantis Kavousianos,
Dimitris Nikolos,
Dimitri Kagaris:
DV-TSE: Difference Vector Based Test Set Embedding.
VLSI-SOC 2003: 343- |
| 2002 |
| 15 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Nikolos:
A ROMless LFSR Reseeding Scheme for Scan-based BIST.
Asian Test Symposium 2002: 206- |
| 14 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST.
ISQED 2002: 261-266 |
| 13 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos,
Spyros Tragoudas:
A new built-in TPG method for circuits with random patternresistant faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 859-866 (2002) |
| 12 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST.
J. Electronic Testing 18(3): 315-332 (2002) |
| 2001 |
| 11 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
A novel reseeding technique for accumulator-based test pattern generation.
ACM Great Lakes Symposium on VLSI 2001: 7-12 |
| 10 |  | Stanislaw J. Piestrak,
Dimitris Bakalis,
Xrysovalantis Kavousianos:
On the Design of Self-Testing Checkers for Modified Berger Codes.
IOLTW 2001: 153-157 |
| 9 |  | Emmanouil Kalligeros,
Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
A New Reseeding Technique for LFSR-Based Test Pattern Generation.
IOLTW 2001: 80-86 |
| 8 |  | Dimitris Bakalis,
Dimitris Nikolos,
Haridimos T. Vergos,
Xrysovalantis Kavousianos:
On Accumulator-Based Bit-Serial Test Response Compaction Schemes.
ISQED 2001: 350- |
| 2000 |
| 7 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Dimitris Nikolos:
Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register.
ITC 2000: 804-811 |
| 1999 |
| 6 |  | Xrysovalantis Kavousianos,
Dimitris Bakalis,
Haridimos T. Vergos,
Dimitris Nikolos,
George Alexiou:
Low Power Dissipation in BIST Schemes for Modified Booth Multipliers.
DFT 1999: 121-129 |
| 5 |  | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Modular TSC Checkers for Bose-Lin and Bose Codes.
VTS 1999: 354-360 |
| 4 |  | Xrysovalantis Kavousianos,
Dimitris Nikolos,
G. Foukarakis,
T. Gnardellis:
New efficient totally self-checking Berger code checkers.
Integration 28(1): 101-118 (1999) |
| 1998 |
| 3 |  | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Novel Single and Double Output TSC Berger Code Checkers.
VTS 1998: 348-353 |
| 1997 |
| 2 |  | Xrysovalantis Kavousianos,
Dimitris Nikolos,
G. Sidiropoulos:
Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes.
DFT 1997: 128-136 |
| 1 |  | Xrysovalantis Kavousianos,
Dimitris Nikolos:
Self-exercising self testing k-order comparators.
VTS 1997: 216-221 |