![]() | ![]() |
| 2011 | ||
|---|---|---|
| 34 | Manolis Katevenis, Margaret Martonosi, Christos Kozyrakis, Olivier Temam: High Performance Embedded Architectures and Compilers, 6th International Conference, HiPEAC 2011, Heraklion, Crete, Greece, January 24-26, 2011. Proceedings ACM 2011 | |
| 33 | Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis: Fine-grain OpenMP runtime support with explicit communication hardware primitives. DATE 2011: 891-894 | |
| 32 | Yanping Gao, Christoforos Kachris, Manolis Katevenis: An efficient sequential iterative matching algorithm for CIOQ switches. ISCC 2011: 558-563 | |
| 31 | Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos: VLSI micro-architectures for high-radix crossbar schedulers. NOCS 2011: 217-224 | |
| 30 | Nikolaos Chrysos, Manolis Katevenis: Distributed WFQ scheduling converging to weighted max-min fairness. Computer Networks 55(3): 792-806 (2011) | |
| 2010 | ||
| 29 | Nikolaos Chrysos, Lydia Y. Chen, Cyriel Minkenberg, Christoforos Kachris, Manolis Katevenis: End-to-end congestion management for non-blocking multi-stage switching fabrics. ANCS 2010: 6 | |
| 28 | Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos: On-chip communication and synchronization mechanisms with cache-integrated network interfaces. Conf. Computing Frontiers 2010: 217-226 | |
| 27 | Xiaojun Yang, Christoforos Kachris, Manolis Katevenis: Efficient implementation of CIOQ switches with sequential iterative matching algorithms. FPT 2010: 433-436 | |
| 26 | Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos: A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area. NOCS 2010: 87-95 | |
| 25 | Christoforos Kachris, George Nikiforos, Stamatis G. Kavadias, Vassilis Papaefstathiou, Manolis Katevenis: Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface. ReConFig 2010: 328-333 | |
| 24 | Manolis Katevenis, Vassilis Papaefstathiou, Stamatis G. Kavadias, Dionisios N. Pnevmatikatos, Federico Silla, Dimitrios S. Nikolopoulos: Explicit Communication and Synchronization in SARC. IEEE Micro 30(5): 30-41 (2010) | |
| 2009 | ||
| 23 | George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Manolis Katevenis, Dionisios N. Pnevmatikatos, Xiaojun Yang: FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability. ICSAMOS 2009: 149-156 | |
| 2008 | ||
| 22 | Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings Springer 2008 | |
| 21 | Manolis Katevenis: Towards unified mechanisms for inter-processor communication. ICSAMOS 2008 | |
| 20 | Dimitrios Simos, Ioannis Papaefstathiou, Manolis Katevenis: Building an FoC Using Large, Buffered Crossbar Cores. IEEE Design & Test of Computers 25(6): 538-548 (2008) | |
| 2007 | ||
| 19 | Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis G. Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis: Prototyping Efficient Interprocessor Communication Mechanisms. ICSAMOS 2007: 26-33 | |
| 18 | George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis: Approaching Ideal NoC Latency with Pre-Configured Routes. NOCS 2007: 153-162 | |
| 17 | Aggelos Ioannou, Manolis Katevenis: Pipelined heap (priority queue) management for advanced scheduling in high-speed networks. IEEE/ACM Trans. Netw. 15(2): 450-461 (2007) | |
| 2006 | ||
| 16 | Nikolaos Chrysos, Manolis Katevenis: Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics. INFOCOM 2006 | |
| 2002 | ||
| 15 | Evangelos P. Markatos, Dionisios N. Pnevmatikatos, Michail Flouris, Manolis Katevenis: Web-conscious storage management for web proxies. IEEE/ACM Trans. Netw. 10(6): 735-748 (2002) | |
| 2001 | ||
| 14 | Manolis Katevenis, Iakovos Mavroidis, Georgios Sapountzis, Evangelia Kalyvianaki, Ioannis Mavroidis, Georgios Glykopoulos: Wormhole IP over (connectionless) ATM. IEEE/ACM Trans. Netw. 9(5): 650-661 (2001) | |
| 1999 | ||
| 13 | Evangelos P. Markatos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Michail Flouris: Secondary Storage Management for Web Proxies. USENIX Symposium on Internet Technologies and Systems 1999 | |
| 12 | Manolis Katevenis, Evangelos P. Markatos, Penny Vatsolaki, Chara Xanthaki: The Remote Enqueue Operation on Networks of Workstations. Informatica (Slovenia) 23(1): (1999) | |
| 1998 | ||
| 11 | Evangelos P. Markatos, Manolis Katevenis, Penny Vatsolaki: The Remote Enqueue Operation on Networks of Workstations. CANPC 1998: 1-14 | |
| 10 | Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis: Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch. HPCA 1998: 47-56 | |
| 1997 | ||
| 9 | George Kornaros, Christoforos E. Kozyrakis, Panagiota Vatsolaki, Manolis Katevenis: Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control. ARVLSI 1997: 127-144 | |
| 8 | Manolis Katevenis, Panagiota Vatsolaki, Dimitrios N. Serpanos, Evangelos P. Markatos: ATLAS: A Single-Chip ATM Switch for NOWs. CANPC 1997: 88-101 | |
| 7 | Evangelos P. Markatos, Manolis Katevenis: User-Level DMA without Operating System Kernel Modification. HPCA 1997: 322-331 | |
| 6 | Manolis Katevenis, Evangelos P. Markatos, George Kalokerinos, Apostolos Dollas: Telegraphos: A Substrate for High-Performance Computing on Workstation Clusters. J. Parallel Distrib. Comput. 43(2): 94-108 (1997) | |
| 1996 | ||
| 5 | Evangelos P. Markatos, Manolis Katevenis: Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters. HPCA 1996: 144-153 | |
| 1995 | ||
| 4 | Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou: Pipelined Memory Shared Buffer for VLSI Switches. SIGCOMM 1995: 39-48 | |
| 1991 | ||
| 3 | Manolis Katevenis, Nestoras Tzartzanis: Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory. ASPLOS 1991: 15-27 | |
| 2 | Manolis Katevenis, Stefanos Sidiropoulos, Costas Courcoubetis: Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip. IEEE Journal on Selected Areas in Communications 9(8): 1265-1279 (1991) | |
| 1987 | ||
| 1 | Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steve Lass: A Vector Hardware Accelerator with Circuit Simulation Emphasis. DAC 1987: 89-94 | |
Colors in the list of coauthors
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