 | 2012 |
| 9 |  | Miroslav Knezevic,
Kazuyuki Kobayashi,
Jun Ikegami,
Shin'ichiro Matsuo,
Akashi Satoh,
Ünal Koçabas,
Junfeng Fan,
Toshihiro Katashita,
Takeshi Sugawara,
Kazuo Sakiyama,
Ingrid Verbauwhede,
Kazuo Ohta,
Naofumi Homma,
Takafumi Aoki:
Fair and Consistent Hardware Evaluation of Fourteen Round Two SHA-3 Candidates.
IEEE Trans. VLSI Syst. 20(5): 827-840 (2012) |
| 2011 |
| 8 |  | Daisuke Fujimoto,
Makoto Nagata,
Toshihiro Katashita,
Akihiro Sasaki,
Yohei Hori,
Akashi Satoh:
A fast power current analysis methodology using capacitor charging model for side channel attack evaluation.
HOST 2011: 87-92 |
| 7 |  | Yohei Hori,
Hyunho Kang,
Toshihiro Katashita,
Akashi Satoh:
Pseudo-LFSR PUF: A Compact, Efficient and Reliable Physical Unclonable Function.
ReConFig 2011: 223-228 |
| 2010 |
| 6 |  | Akashi Satoh,
Toshihiro Katashita,
Takeshi Sugawara,
Naofumi Homma,
Takafumi Aoki:
Hardware Implementations of Hash Function Luffa.
HOST 2010: 130-134 |
| 5 |  | Yohei Hori,
Takahiro Yoshida,
Toshihiro Katashita,
Akashi Satoh:
Quantitative and Statistical Performance Evaluation of Arbiter Physical Unclonable Functions on FPGAs.
ReConFig 2010: 298-303 |
| 2008 |
| 4 |  | Toshihiro Katashita,
Akashi Satoh,
Takeshi Sugawara,
Naofumi Homma,
Takafumi Aoki:
Enhanced Correlation Power Analysis Using Key Screening Technique.
ReConFig 2008: 403-408 |
| 2007 |
| 3 |  | Toshihiro Katashita,
Yoshinori Yamaguchi,
Atusi Maeda,
Kenji Toda:
FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet.
IEICE Transactions 90-D(12): 1923-1931 (2007) |
| 2006 |
| 2 |  | Toshihiro Katashita,
Atusi Maeda,
Kenji Toda,
Yoshinori Yamaguchi:
Highly Efficient String Matching Circuit for IDS with FPGA.
FCCM 2006: 285-286 |
| 1 |  | Toshihiro Katashita,
Atusi Maeda,
Kenji Toda,
Yoshinori Yamaguchi:
A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection.
FPL 2006: 1-4 |