Fatemeh Kashfi

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2011

4 Fatemeh Kashfi, Safar Hatami, Massoud Pedram: Multi-objective optimization techniques for VLSI circuits. ISQED 2011: 156-163

2008

3 Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari: A 65nm 10GHz pipelined MAC structure. ISCAS 2008: 460-463

2 Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari: Designing an ultra-high-speed multiply-accumulate structure. Microelectronics Journal 39(12): 1476-1484 (2008)

2006

1 Fatemeh Kashfi, Seid Mehdi Fakhraie: Implementation of a high-speed low-power 32-bit adder in 70nm technology. ISCAS 2006

	2011
4		Fatemeh Kashfi, Safar Hatami, Massoud Pedram: Multi-objective optimization techniques for VLSI circuits. ISQED 2011: 156-163
	2008
3		Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari: A 65nm 10GHz pipelined MAC structure. ISCAS 2008: 460-463
2		Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari: Designing an ultra-high-speed multiply-accumulate structure. Microelectronics Journal 39(12): 1476-1484 (2008)
	2006
1		Fatemeh Kashfi, Seid Mehdi Fakhraie: Implementation of a high-speed low-power 32-bit adder in 70nm technology. ISCAS 2006

Coauthor Index

Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team —

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1	Sied Mehdi Fakhraie (Seid Mehdi Fakhraie)	[1] [2] [3]
2	Safar Hatami	[4]
3	Massoud Pedram	[4]
4	Saeed Safari	[2] [3]