M. Ch. Karra

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2006

1 M. Ch. Karra, M. P. Bekakos: A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method. The Journal of Supercomputing 37(3): 319-331 (2006)

	2006
1		M. Ch. Karra, M. P. Bekakos: A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method. The Journal of Supercomputing 37(3): 319-331 (2006)

Coauthor Index

1 M. P. Bekakos [1]

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