 | 2010 |
| 3 |  | Yu-Chien Kao,
Hsuan-Ming Chou,
Kun-Ting Tsai,
Shih-Chieh Chang:
An efficient phase detector connection structure for the skew synchronization system.
DAC 2010: 729-734 |
| 2 |  | Yu-Chien Kao,
Hsuan-Ming Chou,
Kun-Ting Tsai,
Shih-Chieh Chang:
Synthesis of an efficient controlling structure for post-silicon clock skew minimization.
ICCAD 2010: 746-749 |
| 2006 |
| 1 |  | Yu-Chien Kao,
Huang-Chih Kuo,
Yin-Tzu Lin,
Chia-Wen Hou,
Yi-Hsien Li,
Hao-Tin Huang,
Youn-Long Lin:
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding.
APCCAS 2006: 562-565 |