Priyank Kalla

	2012
29		Jinpeng Lv, Priyank Kalla, Florian Enescu: Efficient Gröbner basis reductions for formal verification of galois field multipliers. DATE 2012: 899-904
28		Jinpeng Lv, Priyank Kalla: Formal Verification of Galois Field Multipliers Using Computer Algebra Techniques. VLSI Design 2012: 388-393
	2011
27		Christopher Condrat, Priyank Kalla, Steve Blair: Logic synthesis for integrated optics. ACM Great Lakes Symposium on VLSI 2011: 13-18
26		Jinpeng Lv, Priyank Kalla, Florian Enescu: Verification of composite Galois field multipliers over GF ((2m)n) using computer algebra techniques. HLDVT 2011: 136-143
	2009
25		Sivaram Gopalakrishnan, Priyank Kalla: Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis. DATE 2009: 1452-1457
24		Priyank Kalla, Prabhat Mishra: Chairs' welcome message. HLDVT 2009: 1
23		Sivaram Gopalakrishnan, Priyank Kalla: 2009 ACM TODAES best paper award: Optimization of polynomial datapaths using finite ring algebra. ACM Trans. Design Autom. Electr. Syst. 14(4): (2009)
	2008
22		Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram Gopalakrishnan: Verification of arithmetic datapaths using polynomial function models and congruence solving. ICCAD 2008: 122-128
21		Namrata Shekhar, Priyank Kalla, M. Brandon Meredith, Florian Enescu: Simulation Bounds for Equivalence Verification of Polynomial Datapaths Using Finite Ring Algebra. IEEE Trans. VLSI Syst. 16(4): 376-387 (2008)
	2007
20		Sivaram Gopalakrishnan, Priyank Kalla, Florian Enescu: Optimization of Arithmetic Datapaths with Finite Word-Length Operands. ASP-DAC 2007: 511-516
19		Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon Meredith, Florian Enescu: Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors. ICCAD 2007: 143-148
18		Christopher Condrat, Priyank Kalla: A Gröbner Basis Approach to CNF-Formulae Preprocessing. TACAS 2007: 618-631
17		Sivaram Gopalakrishnan, Priyank Kalla: Optimization of polynomial datapaths using finite ring algebra. ACM Trans. Design Autom. Electr. Syst. 12(4): (2007)
	2006
16		Namrata Shekhar, Priyank Kalla, Florian Enescu: Equivalence verification of arithmetic datapaths with multiple word-length operands. DATE 2006: 824-829
15		Namrata Shekhar, Priyank Kalla, M. Brandon Meredith, Florian Enescu: Simulation Bounds for Equivalence Verification of Arithmetic Datapaths with Finite Word-Length Operands. FMCAD 2006: 179-186
14		Maciej J. Ciesielski, Priyank Kalla, Serkan Askar: Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs. IEEE Trans. Computers 55(9): 1188-1201 (2006)
	2005
13		Namrata Shekhar, Priyank Kalla, Florian Enescu, Sivaram Gopalakrishnan: Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra. ICCAD 2005: 291-296
12		Namrata Shekhar, Priyank Kalla, Sivaram Gopalakrishnan, Florian Enescu: Exploiting Vanishing Polynomials for Equivalence Veri.cation of Fixed-Size Arithmetic Datapaths. ICCD 2005: 215-220
11		Vijay Durairaj, Priyank Kalla: Variable Ordering for Efficient SAT Search by Analyzing Constraint-Variable Dependencies. SAT 2005: 415-422
	2004
10		Vijay Durairaj, Priyank Kalla: Guiding CNF-SAT search via efficient constraint partitioning. ICCAD 2004: 498-501
	2002
9		Maciej J. Ciesielski, Priyank Kalla, Zhihong Zeng, Bruno Rouzeyre: Taylor Expansion Diagrams: A Compact, Canonical Representation with Applications to Symbolic Verification. DATE 2002: 285-289
8		Navin Vemuri, Priyank Kalla, Russell Tessier: BDD-based logic synthesis for LUT-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 7(4): 501-525 (2002)
7		Priyank Kalla, Maciej J. Ciesielski: A comprehensive approach to the partial scan problem using implicitstate enumeration. IEEE Trans. on CAD of Integrated Circuits and Systems 21(7): 810-826 (2002)
	2001
6		Zhihong Zeng, Priyank Kalla, Maciej J. Ciesielski: LPSAT: a unified approach to RTL satisfiability. DATE 2001: 398-402
5		Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski: Strategies for solving the Boolean satisfiability problem using binary decision diagrams. Journal of Systems Architecture 47(6): 491-503 (2001)
	2000
4		Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang: A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm. DATE 2000: 232-236
	1999
3		Priyank Kalla, Maciej J. Ciesielski: Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence. DATE 1999: 638-642
	1998
2		Priyank Kalla, Maciej J. Ciesielski: A comprehensive approach to the partial scan problem using implicit state enumeration. ITC 1998: 651-657
	1997
1		Priyank Kalla, Maciej J. Ciesielski: Testability of Sequential Circuits with Multi-Cycle False Path. VTS 1997: 322-328

Coauthor Index

1	Serkan Askar	[14]
2	Steve Blair	[27]
3	Maciej J. Ciesielski	[1] [2] [3] [4] [5] [6] [7] [9] [14]
4	Christopher Condrat	[18] [27]
5	Vijay Durairaj	[10] [11]
6	Florian Enescu	[12] [13] [15] [16] [19] [20] [21] [26] [29]
7	Sivaram Gopalakrishnan	[12] [13] [17] [19] [20] [22] [23] [25]
8	ChiLai Huang	[4]
9	Jinpeng Lv	[26] [28] [29]
10	M. Brandon Meredith	[15] [19] [21]
11	Prabhat Mishra	[24]
12	Bruno Rouzeyre	[9]
13	Namrata Shekhar	[12] [13] [15] [16] [21] [22]
14	Russell Tessier	[8]
15	Neal Tew	[22]
16	Navin Vemuri	[8]
17	Zhihong Zeng	[4] [5] [6] [9]

Colors in the list of coauthors

Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page