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| 2011 | ||
|---|---|---|
| 6 | Yong-Kyu Jung: Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP Architectures. Signal Processing Systems 62(3): 273-285 (2011) | |
| 2007 | ||
| 5 | Yong-Kyu Jung: Fault-recovery Non-FPGA-based Adaptable Computing System Design. AHS 2007: 709-716 | |
| 4 | Yong-Kyu Jung: Pure ASIC-Based Retargetable Computing: Architectures, Advantages, and Challenges. ERSA 2007: 231-237 | |
| 2006 | ||
| 3 | Yong-Kyu Jung: A Hardware/Software Co-reconfigurable Multimedia Architecture. ESTImedia 2006: 73-78 | |
| 2 | Yong-Kyu Jung: Desing and Optimization of a Programmable Instruction Decoder for DSP Architecture. SiPS 2006: 333-338 | |
| 1999 | ||
| 1 | Vijay K. Madisetti, Yong-Kyu Jung, Moinul H. Khan, Jeongwook Kim, Theodore Finnessy: Reengineering Legacy Embedded Systems. IEEE Design & Test of Computers 16(2): 38-47 (1999) | |
| 1 | Theodore Finnessy | [1] |
| 2 | Moinul H. Khan | [1] |
| 3 | Jeongwook Kim | [1] |
| 4 | Vijay K. Madisetti | [1] |
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