 | 2012 |
|---|
| 34 |       | Daeyeal Lee,
Ik Joon Chang,
Sangyong Yoon,
Joonsuc Jang,
Dong-Su Jang,
Wook-Ghee Hahn,
Jong-Yeol Park,
Doo-Gon Kim,
Chiweon Yoon,
Bong-Soon Lim,
ByungJun Min,
Sung-Won Yun,
Ji-Sang Lee,
Il-Han Park,
Kyung-Ryun Kim,
Jeong-Yun Yun,
Youse Kim,
Yong-Sung Cho,
Kyung-Min Kang,
Sang-Hyun Joo,
Jin-Young Chun,
Jung-No Im,
Seunghyuk Kwon,
Seokjun Ham,
Ansoo Park,
Jae-Duk Yu,
Nam-Hee Lee,
Tae-Sung Lee,
Moosung Kim,
Hoosung Kim,
Ki-Whan Song,
Byung-Gil Jeon,
Kihwan Choi,
Jin-Man Han,
Kyehyun Kyung,
Youngho Lim,
Young-Hyun Jun:
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology.
ISSCC 2012: 430-432 |
| 33 | | Jung-Sik Kim,
Chi Sung Oh,
Hocheol Lee,
Donghyuk Lee,
Hyong-Ryol Hwang,
Sooman Hwang,
Byongwook Na,
Joungwook Moon,
Jin-Guk Kim,
Hanna Park,
Jang-Woo Ryu,
Kiwon Park,
Sang-Kyu Kang,
So-Young Kim,
Hoyoung Kim,
Jong-Min Bang,
Hyunyoon Cho,
Minsoo Jang,
Cheolmin Han,
Jung-Bae Lee,
Joo-Sun Choi,
Young-Hyun Jun:
A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking.
J. Solid-State Circuits 47(1): 107-116 (2012) |
| 32 | | Chulbum Kim,
Jinho Ryu,
Tae-Sung Lee,
Hyunggon Kim,
Jaewoo Lim,
Jaeyong Jeong,
Seonghwan Seo,
Hongsoo Jeon,
Bokeun Kim,
Inyoul Lee,
Dooseop Lee,
Pansuk Kwak,
Seongsoon Cho,
Yongsik Yim,
Changhyun Cho,
Woopyo Jeong,
Kwang-Il Park,
Jin-Man Han,
Duheon Song,
Kyehyun Kyung,
Youngho Lim,
Young-Hyun Jun:
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface.
J. Solid-State Circuits 47(4): 981-989 (2012) |
| 2011 |
|---|
| 31 | | Young-Wook Kim,
Joung-Yeal Kim,
Young-Hyun Jun,
Bai-Sun Kong:
Novel Low-Voltage Small-Area I/O Buffer for Mixed-Voltage Application.
FGIT-CA/CES3 2011: 364-370 |
| 30 | | Jung-Sik Kim,
Chi Sung Oh,
Hocheol Lee,
Donghyuk Lee,
Hyong-Ryol Hwang,
Sooman Hwang,
Byongwook Na,
Joungwook Moon,
Jin-Guk Kim,
Hanna Park,
Jang-Woo Ryu,
Kiwon Park,
Sang-Kyu Kang,
So-Young Kim,
Hoyoung Kim,
Jong-Min Bang,
Hyunyoon Cho,
Minsoo Jang,
Cheolmin Han,
Jung-Bae Lee,
Kyehyun Kyung,
Joo-Sun Choi,
Young-Hyun Jun:
A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking.
ISSCC 2011: 496-498 |
| 29 | | Seung-Jun Bae,
Young-Soo Sohn,
Tae-Young Oh,
Si-Hong Kim,
Yun-Seok Yang,
Dae-Hyun Kim,
Sang-Hyup Kwak,
Ho-Seok Seol,
Chang-Ho Shin,
Min-Sang Park,
Gong-Heom Han,
Byeong-Cheol Kim,
Yong-Ki Cho,
Hye-Ran Kim,
Su-Yeon Doo,
Young-Sik Kim,
Dong-Seok Kang,
Young-Ryeol Choi,
Sam-Young Bang,
Sun-Young Park,
Yong-Jae Shin,
Gil-Shin Moon,
Cheol-Goo Park,
Woo-Seop Kim,
Hyang-Ja Yang,
Jeong-Don Lim,
Kwang-Il Park,
Joo-Sun Choi,
Young-Hyun Jun:
A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW.
ISSCC 2011: 498-500 |
| 28 | | Hoeju Chung,
Byung-Hoon Jeong,
ByungJun Min,
Youngdon Choi,
Beak-Hyung Cho,
Junho Shin,
Jinyoung Kim,
Jung Sunwoo,
Joon-min Park,
Qi Wang,
Yong-jun Lee,
Sooho Cha,
Dukmin Kwon,
Sangtae Kim,
Sunghoon Kim,
Yoohwan Rho,
Mu-Hui Park,
Jaewhan Kim,
Ickhyun Song,
Sunghyun Jun,
Jaewook Lee,
KiSeung Kim,
Ki-won Lim,
Won-ryul Chung,
ChangHan Choi,
HoGeun Cho,
Inchul Shin,
Woochul Jun,
Seokwon Hwang,
Ki-Whan Song,
KwangJin Lee,
Sang-whan Chang,
Woo-Yeong Cho,
Jei-Hwan Yoo,
Young-Hyun Jun:
A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW.
ISSCC 2011: 500-502 |
| 27 | | Seong-Won Kang,
Jung-Hoon Chun,
Young-Hyun Jun,
Kee-Won Kwon:
A study on accelerated built-in self test of multi-Gb/s high speed interfaces.
NESEA 2011: 1-4 |
| 26 | | Seong-Young Seo,
Jung-Hoon Chun,
Young-Hyun Jun,
Seok Kim,
Kee-Won Kwon:
A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity.
IEEE Trans. on Circuits and Systems 58-II(10): 632-636 (2011) |
| 25 | | Jong-Pil Son,
Jin Ho Kim,
Woo Song Ahn,
Seung Uk Han,
Satoru Yamada,
Byung-Sick Moon,
Churoo Park,
Hong-Sun Hwang,
Seong-Jin Jang,
Joo-Sun Choi,
Young-Hyun Jun,
Soo-Won Kim:
An Area-Efficient, Low-VDD, Highly Reliable Multi-Cell Antifuse System Fully Operative in DRAMs.
IEICE Transactions 94-C(10): 1690-1697 (2011) |
| 24 | | Dong-Su Lee,
Sung-Chan Kang,
Young-Hyun Jun,
Bai-Sun Kong:
A Novel Body Bias Selection Scheme for Leakage Minimization.
IEICE Transactions 94-C(9): 1490-1493 (2011) |
| 23 | | Tae-Young Oh,
Young-Soo Sohn,
Seung-Jun Bae,
Min-Sang Park,
Ji-Hoon Lim,
Yong-Ki Cho,
Dae-Hyun Kim,
Dong-Min Kim,
Hye-Ran Kim,
Hyun-Joong Kim,
Jin-Hyun Kim,
Jin-Kook Kim,
Young-Sik Kim,
Byeong-Cheol Kim,
Sang-Hyup Kwak,
Jae-Hyung Lee,
Jae-Young Lee,
Chang-Ho Shin,
Yun-Seok Yang,
Beom-Sig Cho,
Sam-Young Bang,
Hyang-Ja Yang,
Young-Ryeol Choi,
Gil-Shin Moon,
Cheol-Goo Park,
Seokwon Hwang,
Jeong-Don Lim,
Kwang-Il Park,
Joo-Sun Choi,
Young-Hyun Jun:
A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction.
J. Solid-State Circuits 46(1): 107-118 (2011) |
| 22 | | Dong-Su Lee,
Young-Hyun Jun,
Bai-Sun Kong:
Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM.
J. Solid-State Circuits 46(10): 2396-2405 (2011) |
| 2010 |
|---|
| 21 | | Jun-Hyun Bae,
Young-Soo Sohn,
Seung-Jun Bae,
Kwang-Il Park,
Joo-Sun Choi,
Young-Hyun Jun,
Jae-Yoon Sim,
Hong-June Park:
A crosstalk-and-ISI equalizing receiver in 2-drop single-ended SSTL memory channel.
CICC 2010: 1-4 |
| 20 | | Tae-Young Oh,
Young-Soo Sohn,
Seung-Jun Bae,
Min-Sang Park,
Ji-Hoon Lim,
Yong-Ki Cho,
Dae-Hyun Kim,
Dong-Min Kim,
Hye-Ran Kim,
Hyun-Joong Kim,
Jin-Hyun Kim,
Jin-Kook Kim,
Young-Sik Kim,
Byeong-Cheol Kim,
Sang-Hyup Kwak,
Jae-Hyung Lee,
Jae-Young Lee,
Chang-Ho Shin,
Yun-Seok Yang,
Beom-Sig Cho,
Sam-Young Bang,
Hyang-Ja Yang,
Young-Ryeol Choi,
Gil-Shin Moon,
Cheol-Goo Park,
Seokwon Hwang,
Jeong-Don Lim,
Kwang-Il Park,
Joo-Sun Choi,
Young-Hyun Jun:
A 7Gb/s/pin GDDR5 SDRAM with 2.5ns bank-to-bank active time and no bank-group restriction.
ISSCC 2010: 434-435 |
| 19 | | Jae-Hyuck Woo,
Jae-Goo Lee,
Young-Hyun Jun,
Bai-Sun Kong:
Low-Power High-Speed Data Serializer for Mobile TFT-LCD Driver ICs.
IEICE Transactions 93-A(12): 2621-2622 (2010) |
| 18 | | Joung-Yeal Kim,
Su-Jin Park,
Yong-Ki Kim,
Sang-Keun Han,
Young-Hyun Jun,
Chil-Gee Lee,
Tae Hee Han,
Bai-Sun Kong:
New Low-Voltage Low-Latency Mixed-Voltage I/O Buffer.
IEICE Transactions 93-C(5): 709-711 (2010) |
| 17 | | Uksong Kang,
Hoeju Chung,
Seongmoo Heo,
Dukha Park,
Hoon Lee,
Jin Ho Kim,
Soon-Hong Ahn,
Sooho Cha,
Jaesung Ahn,
Dukmin Kwon,
Jaewook Lee,
Han-Sung Joo,
Woo-Seop Kim,
Dong Hyeon Jang,
Nam-Seog Kim,
Jung-Hwan Choi,
Tae-Gyeong Chung,
Jei-Hwan Yoo,
Joo-Sun Choi,
Changhyun Kim,
Young-Hyun Jun:
8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology.
J. Solid-State Circuits 45(1): 111-119 (2010) |
| 16 | | Kwang-Il Oh,
Lee-Sup Kim,
Kwang-Il Park,
Young-Hyun Jun,
Joo-Sun Choi,
Kinam Kim:
Correction on "A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme" [Aug 09 2222-2232].
J. Solid-State Circuits 45(2): 497 (2010) |
| 15 | | Ki-Whan Song,
Jinyoung Kim,
Jae-Man Yoon,
Sua Kim,
Huijung Kim,
Hyun-Woo Chung,
Hyungi Kim,
Kanguk Kim,
Hwan-Wook Park,
Hyun Chul Kang,
Nam-Kyun Tak,
Dukha Park,
Woo-Seop Kim,
Yeong-Taek Lee,
Yong Chul Oh,
Gyo-Young Jin,
Jei-Hwan Yoo,
Donggun Park,
Kyungseok Oh,
Changhyun Kim,
Young-Hyun Jun:
A 31 ns Random Cycle VCAT-Based 4F 2 DRAM With Manufacturability and Enhanced Cell Efficiency.
J. Solid-State Circuits 45(4): 880-888 (2010) |
| 2009 |
|---|
| 14 | | Suk-Soo Pyo,
Cheol-Ha Lee,
Gyun-Hong Kim,
Kyu-Myung Choi,
Young-Hyun Jun,
Bai-Sun Kong:
45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme.
ISCAS 2009: 2517-2520 |
| 13 | | Yongsam Moon,
Yong-Ho Cho,
Hyun-Bae Lee,
Byung-Hoon Jeong,
Seok-Hun Hyun,
Byung-Chul Kim,
In-Chul Jeong,
Seong-Young Seo,
Junho Shin,
Seok-Woo Choi,
Ho-Sung Song,
Jung-Hwan Choi,
Kyehyun Kyung,
Young-Hyun Jun,
Kinam Kim:
1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture.
ISSCC 2009: 128-129 |
| 12 | | Kyung-Soo Ha,
Lee-Sup Kim,
Seung-Jun Bae,
Kwang-Il Park,
Joo-Sun Choi,
Young-Hyun Jun,
Kinam Kim:
A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces.
ISSCC 2009: 138-139 |
| 11 | | Joung-Yeal Kim,
Young-Hyun Jun,
Bai-Sun Kong:
CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction.
IEEE Trans. on Circuits and Systems 56-II(1): 11-15 (2009) |
| 10 | | Young-Won Kim,
Joo-Seong Kim,
Jae-Hyuk Oh,
Yoon-Suk Park,
Jong-Woo Kim,
Kwang-Il Park,
Bai-Sun Kong,
Young-Hyun Jun:
Low-Power CMOS Synchronous Counter With Clock Gating Embedded Into Carry Propagation.
IEEE Trans. on Circuits and Systems 56-II(8): 649-653 (2009) |
| 2008 |
|---|
| 9 | | Youn-Sik Park,
Sung-Wook Lee,
Bai-Sun Kong,
Kwang-Il Park,
Jeong-Don Ihm,
Joo-Sun Choi,
Young-Hyun Jun:
PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion.
ISCAS 2008: 1902-1905 |
| 8 | | Chan-Kyung Kim,
Bai-Sun Kong,
Chil-Gee Lee,
Young-Hyun Jun:
CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control.
ISCAS 2008: 3094-3097 |
| 7 | | Chul Soo Kim,
Joo-Seong Kim,
Bai-Sun Kong,
Yongsam Moon,
Young-Hyun Jun:
Presetting pulse-based flip-flop.
ISCAS 2008: 588-591 |
| 6 | | Gyu-Yeol Kim,
Eon-Jo Byunb,
Ki-Sang Kang,
Young-Hyun Jun,
Bai-Sun Kong:
Wafer-Level Characterization of Probecards using NAC Probing.
ITC 2008: 1-9 |
| 2007 |
|---|
| 5 | | Min-su Kim,
Young-Hyun Jun,
Sung-Bae Park,
Bai-Sun Kong:
CMOS Level Converter with Balanced Rise and Fall Delays.
IEICE Transactions 90-C(1): 192-195 (2007) |
| 4 | | Chan-Kyung Kim,
Jae-Goo Lee,
Young-Hyun Jun,
Chil-Gee Lee,
Bai-Sun Kong:
CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control.
Microelectronics Journal 38(10-11): 1042-1049 (2007) |
| 2006 |
|---|
| 3 | | Young-Hyun Jun,
Jong-Ho Yun,
Jin-Sung Park,
Myung-Ryul Choi:
Design of an Image Interpolator for Low Computation Complexity.
JIPS 2(3): 153-158 (2006) |
| 1993 |
|---|
| 2 |  | Young-Hyun Jun,
Weon-Hwa Jeong,
Jong-Hoon Park,
Tae-Hoon Kim,
Seong-Wook Kim,
Jae-Sik Lee,
Seong-Jin Jang,
Chang-Man Khang,
Hee-Gook Lee:
A New Colum Redundancy Scheme For Fast Access Time of 64-Mb DRAM.
ISCAS 1993: 1937-1940 |
| 1989 |
|---|
| 1 | | Young-Hyun Jun,
Ki Jun,
Song-Bai Park:
An accurate and efficient delay time modeling for MOS logic circuits using polynomial approximation.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(9): 1027-1032 (1989) |
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