 | 2006 |
| 5 |  | Toai Vo,
Zhiyuan Wang,
Ted Eaton,
Pradipta Ghosh,
Huai Li,
Young Lee,
Weili Wang,
Hong Shin Jun,
Rong Fang,
Dan Singletary,
Xinli Gu:
Design for Board and System Level Structural Test and Diagnosis.
ITC 2006: 1-10 |
| 2004 |
| 4 |  | Heon C. Kim,
Hong Shin Jun,
Xinli Gu,
Sung Soo Chung:
At-Speed Interconnect Test and Diagnosis of External Memories on a System.
ITC 2004: 156-162 |
| 3 |  | Hong Shin Jun,
Sung Soo Chung,
Sang H. Baeg:
Removing JTAG Bottlenecks in System Interconnect Test.
ITC 2004: 173-180 |
| 1996 |
| 2 |  | Hong Shin Jun,
Sun Young Hwang:
Automatic synthesis of dynamically configured pipelines supporting variable data initiation intervals.
IEEE Trans. VLSI Syst. 4(2): 279-285 (1996) |
| 1994 |
| 1 |  | Hong Shin Jun,
Sun Young Hwang:
Automatic Synthesis of Pipeline Structures with Variable Data Initiation Intervals.
DAC 1994: 537-541 |