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Tso-Bing Juang Coauthor index pubzone.org

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10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Hsin-Hao Peng, Chao-Tsung Kuo: Area-efficient 3-input decimal adders using simplified carry and sum vectors. VLSI-SoC 2011: 25-30
2010
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Chin-Chieh Chiu, Ming-Yu Tsai: Improved Area-Efficient Weighted Modulo 2n + 1 Adder Design With Simple Correction Schemes. IEEE Trans. on Circuits and Systems 57-II(3): 198-202 (2010)
2009
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPramod K. Meher, Javier Valls, Tso-Bing Juang, K. Sridharan, Koushik Maharatna: 50 Years of CORDIC: Algorithms, Architectures, and Applications. IEEE Trans. on Circuits and Systems 56-I(9): 1893-1907 (2009)
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Sheng-Hung Chen, Huang-Jia Cheng: A Lower Error and ROM-Free Logarithmic Converter for Digital Signal Processing Applications. IEEE Trans. on Circuits and Systems 56-II(12): 931-935 (2009)
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Ming-Yu Tsai, Chin-Chieh Chiu: Corrections to "VLSI Design of Diminished-One Modulo 2n + 1 Adder Using Circular Carry Selection" [Sep 08 897-901]. IEEE Trans. on Circuits and Systems 56-II(3): 260-261 (2009)
2008
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li: A novel VLSI iterative divider architecture for fast quotient generation. ISCAS 2008: 3358-3361
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang: Low Latency Angle Recoding Methods for the Higher Bit-Width Parallel CORDIC Rotator Implementations. IEEE Trans. on Circuits and Systems 55-II(11): 1139-1143 (2008)
2006
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang: Area/Delay Efficient Recoding Methods for Parallel CORDIC Rotations. APCCAS 2006: 1539-1542
2005
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Shen-Fu Hsiao, Ming-Yu Tsai, Jenq-Shiun Jan: A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition. IEICE Transactions 88-D(7): 1464-1471 (2005)
2002
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTso-Bing Juang, Jeng-Hsiun Jan, Ming-Yu Tsai, Shen-Fu Hsiao: Partition methodology for the final adder in a tree-structure parallel multiplier generator. APCCAS (1) 2002: 471-474

Coauthor Index

1Sheng-Hung Chen [5] [7]
2Huang-Jia Cheng [7]
3Chin-Chieh Chiu [6] [9]
4Shen-Fu Hsiao [1] [2]
5Jeng-Hsiun Jan [1]
6Jenq-Shiun Jan [2]
7Chao-Tsung Kuo [10]
8Shin-Mao Li [5]
9Koushik Maharatna [8]
10Pramod K. Meher [8]
11Hsin-Hao Peng [10]
12K. Sridharan [8]
13Ming-Yu Tsai [1] [2] [6] [9]
14Javier Valls-Coquillat (Javier Valls) [8]

Colors in the list of coauthors

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