Jorge Juan

	2011
6		Julian Viejo, Jorge Juan, Manuel Jesús Bellido Díaz, Alejandro Millán, Paulino Ruiz-de-Clavijo: Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation. IEEE T. Instrumentation and Measurement 60(12): 3961-3963 (2011)
5		David Guerrero, Alejandro Millán, Jorge Juan, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julian Viejo: Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells. J. Low Power Electronics 7(3): 444-452 (2011)
	2010
4		Julian Viejo, Jose Ignacio Villar, Jorge Juan, Alejandro Millán, Manuel Jesús Bellido Díaz, Enrique Ostúa: Design and implementation of a suitable core for on-chip long-term verification. SIES 2010: 234-237
3		Alejandro Millán, Manuel J. Bellido, Jorge Juan, David Guerrero, Paulino Ruiz-de-Clavijo, Julian Viejo: Comprehensive Analysis on the Internal Power Dissipation of Static CMOS Cells in Ultra-Deep Sub-Micron Technologies. J. Low Power Electronics 6(1): 93-102 (2010)
	2008
2		Alejandro Millán, Jorge Juan, Manuel J. Bellido, David Guerrero, Paulino Ruiz-de-Clavijo, Julian Viejo: Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates. PATMOS 2008: 389-398
	2007
1		Julian Viejo, Alejandro Millán, Manuel J. Bellido, Jorge Juan, Paulino Ruiz-de-Clavijo, David Guerrero, Enrique Ostúa, A. Munoz: Design of a FFT/IFFT module as an IP core suitable for embedded systems. SIES 2007: 337-340

Coauthor Index

1	Manuel Jesús Bellido Díaz (Manuel J. Bellido)	[1] [2] [3] [4] [5] [6]
2	David Guerrero	[1] [2] [3] [5]
3	Alejandro Millán (Alejandro Millán Calderón)	[1] [2] [3] [4] [5] [6]
4	A. Munoz	[1]
5	Enrique Ostúa	[1] [4] [5]
6	Paulino Ruiz-de-Clavijo	[1] [2] [3] [5] [6]
7	Julian Viejo	[1] [2] [3] [4] [5] [6]
8	Jose Ignacio Villar	[4]

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