 | 2011 |
| 10 |  | Bijoy A. Jose,
Abdoulaye Gamatié,
Julien Ouy,
Sandeep K. Shukla:
SMT based false causal loop detection during code synthesis from Polychronous specifications.
MEMOCODE 2011: 109-118 |
| 2010 |
| 9 |  | Bijoy A. Jose,
Jason Pribble,
Sandeep K. Shukla:
Faster Software Synthesis Using Actor Elimination Techniques for Polychronous Formalism.
ACSD 2010: 147-156 |
| 8 |  | Bijoy A. Jose,
Sandeep K. Shukla:
An alternative polychronous model and synthesis methodology for model-driven embedded software.
ASP-DAC 2010: 13-18 |
| 7 |  | Mahesh Nanjundappa,
Hiren D. Patel,
Bijoy A. Jose,
Sandeep K. Shukla:
SCGPSim: a fast SystemC simulator on GPUs.
ASP-DAC 2010: 149-154 |
| 2009 |
| 6 |  | Bijoy A. Jose,
Jason Pribble,
Lemaire Stewart,
Sandeep K. Shukla:
EmCodeSyn: A visual framework for multi-rate data flow specifications and code synthesis for embedded applications.
FDL 2009: 1-6 |
| 5 |  | Bijoy A. Jose,
Hiren D. Patel,
Sandeep K. Shukla,
Jean-Pierre Talpin:
Generating Multi-Threaded code from Polychronous Specifications.
Electr. Notes Theor. Comput. Sci. 238(1): 57-69 (2009) |
| 4 |  | Bijoy A. Jose,
Bin Xue,
Sandeep K. Shukla:
An Analysis of the Composition of Synchronous Systems.
Electr. Notes Theor. Comput. Sci. 245: 69-84 (2009) |
| 3 |  | Bijoy A. Jose,
Damu Radhakrishnan:
Redundant binary partial product generators for compact accumulation in Booth multipliers.
Microelectronics Journal 40(11): 1606-1612 (2009) |
| 2008 |
| 2 |  | Syed Suhaib,
Bijoy A. Jose,
Sandeep K. Shukla,
Deepak Mathaikutty:
Formal Transformation of a KPN Specification to a GALS Implementation.
FDL 2008: 84-89 |
| 1 |  | Bijoy A. Jose,
Sandeep K. Shukla,
Hiren D. Patel,
Jean-Pierre Talpin:
On the Deterministic Multi-threaded Software Synthesis from Polychronous Specifications.
MEMOCODE 2008: 129-138 |