 | 2010 |
|---|
| 10 |       | Christopher T. Johnston,
Donald G. Bailey,
Paul J. Lyons:
Notations for Multiphase Pipelines.
DELTA 2010: 212-216 |
| 9 | | Donald G. Bailey,
Christopher T. Johnston:
Algorithm Transformation for FPGA Implementation.
DELTA 2010: 77-81 |
| 2009 |
|---|
| 8 | | Christopher T. Johnston,
Paul J. Lyons,
Donald G. Bailey:
User evaluation and overview of a visual language for real time image processing on FPGAs.
CHINZ 2009: 85-92 |
| 2008 |
|---|
| 7 | | Christopher T. Johnston,
Donald G. Bailey:
FPGA implementation of a Single Pass Connected Components Algorithm.
DELTA 2008: 228-231 |
| 6 | | Christopher T. Johnston,
Paul J. Lyons,
Donald G. Bailey:
A Visual Notation for Processor and Resource Scheduling.
DELTA 2008: 296-301 |
| 5 | | Donald G. Bailey,
Christopher T. Johnston,
Ni Ma:
Connected components analysis of streamed images.
FPL 2008: 679-682 |
| 2006 |
|---|
| 4 | | Christopher T. Johnston,
Donald G. Bailey,
Paul J. Lyons:
Towards a visual notation for pipelining in a visual programming language for programming FPGAs.
CHINZ 2006: 1-9 |
| 3 | | Donald G. Bailey,
K. T. Gribbon,
Christopher T. Johnston,
Montree Siripruchyanun:
GATOS: A Windowing Operating System for FPGAs.
DELTA 2006: 405-409 |
| 2 | | K. T. Gribbon,
Donald G. Bailey,
Christopher T. Johnston:
Using Design Patterns to Overcome Image Processing Constraints on FPGAs.
DELTA 2006: 47-56 |
| 1 | | Christopher T. Johnston,
Donald G. Bailey,
Paul John Lyons:
A Visual Environment for Real-Time Image Processing in Hardware (VERTIPH).
EURASIP J. Emb. Sys. 2006: (2006) |
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