Raúl Jiménez

	2011
12		Raúl Jiménez, Flutra Osmani, Björn Knutsson: Sub-second lookups on a large-scale Kademlia-based overlay. Peer-to-Peer Computing 2011: 82-91
	2009
11		Raúl Jiménez, Flutra Osmani, Björn Knutsson: Connectivity Properties of Mainline BitTorrent DHT Nodes. Peer-to-Peer Computing 2009: 262-270
	2006
10		Raúl Jiménez, Pilar Parra, Javier Castro, Manuel Sánchez, Antonio J. Acosta: Optimization of Master-Slave Flip-Flops for High-Performance Applications. PATMOS 2006: 439-449
9		Fermín Dalmagro, Juan Jiménez, Raúl Jiménez, Haydée Lugo: Bounded-rational-prisoners' dilemma: On critical phenomena of cooperation. Applied Mathematics and Computation 176(2): 462-469 (2006)
	2005
8		Francisco de Toro, Raúl Jiménez, Manuel Sánchez, Julio Ortega: Synthesis of Hybrid CBL/CMOS Cell Using Multiobjective Evolutionary Algorithms. PATMOS 2005: 629-637
7		Pilar Parra, Antonio J. Acosta, Raúl Jiménez, Manuel Valencia: Selective Clock-Gating for Low-Power Synchronous Counters. J. Low Power Electronics 1(1): 11-19 (2005)
	2003
6		Raúl Jiménez, Pilar Parra, Pedro Sanmartín, Antonio J. Acosta: A New Hybrid CBL-CMOS Cell for Optimum Noise/Power Application. PATMOS 2003: 491-500
	2002
5		Raúl Jiménez, Pilar Parra, Pedro Sanmartín, Antonio J. Acosta: A Technique to Generate CMOS VLSI Flip-Flops Based on Differential Latches. PATMOS 2002: 209-218
	2001
4		José M. Quintana, Maria J. Avedillo, Raúl Jiménez, Esther Rodríguez-Villegas: Practical low-cost CPL implementations threshold logic functions. ACM Great Lakes Symposium on VLSI 2001: 139-144
	2000
3		Raúl Jiménez, Antonio J. Acosta, Eduardo J. Peralías, Adoración Rueda: An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits. PATMOS 2000: 295-305
2		Antonio J. Acosta, Raúl Jiménez, Jorge Juan-Chico, Manuel J. Bellido, Manuel Valencia: Influence of Clocking Strategies on the Design of Low Switching-Noise Digital and Mixed-Signal VLSI Circuits. PATMOS 2000: 316-326
	1995
1		Antonio J. Acosta, Manuel J. Bellido, Manuel Valencia, Angel Barriga Barros, Raúl Jiménez, José L. Huertas: New CMOS VLSI linear self-timed architectures. ASYNC 1995: 14-23

Coauthor Index

1	Antonio J. Acosta	[1] [2] [3] [5] [6] [7] [10]
2	Maria J. Avedillo	[4]
3	Angel Barriga Barros	[1]
4	Javier Castro	[10]
5	Fermín Dalmagro	[9]
6	Manuel Jesús Bellido Díaz (Manuel J. Bellido)	[1] [2]
7	José Luis Huertas (José L. Huertas)	[1]
8	Juan Jiménez	[9]
9	Jorge Juan-Chico	[2]
10	Björn Knutsson	[11] [12]
11	Haydée Lugo	[9]
12	Julio Ortega	[8]
13	Flutra Osmani	[11] [12]
14	Pilar Parra	[5] [6] [7] [10]
15	Eduardo J. Peralías	[3]
16	José M. Quintana	[4]
17	Esther Rodríguez-Villegas	[4]
18	Adoración Rueda	[3]
19	Manuel Sánchez	[8] [10]
20	Pedro Sanmartín	[5] [6]
21	Francisco de Toro	[8]
22	Manuel Valencia	[1] [2] [7]

Colors in the list of coauthors

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