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 | 2006 | |
|---|---|---|
| 3 |      | Luo Jianwen, Jong Ching Chuen: Matrix Inversion on Reconfigurable Hardware using Binary-coded z-path CORDIC. APCCAS 2006: 1176-1179 |
| 2 | | Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Luo Jianwen: An Efficient Algorithm for DPA-resistent RSA. APCCAS 2006: 1659-1662 |
| 2004 | ||
| 1 | | Luo Jianwen, Jong Ching Chuen: Partially Reconfigurable Matrix Multiplication for Area and Time Efficiency on FPGAs. DSD 2004: 244-248 |
| 1 | Jong Ching Chuen | [1] [3] |
| 2 | Jussipekka Leiwo | [2] |
| 3 | Thambipillai Srikanthan | [2] |
| 4 | Yi Wang | [2] |
Colors in the list of coauthors
Last update Sun Jun 3 16:06:10 2012 CET by the DBLP Team —
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