Yang Jiangping

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2004

1 Yang Jiangping, Li Guixiang, Wang Wanglei: A model of VLSI interconnect test based on boundary scan. ICARCV 2004: 557-561

	2004
1		Yang Jiangping, Li Guixiang, Wang Wanglei: A model of VLSI interconnect test based on boundary scan. ICARCV 2004: 557-561

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