 | 2011 |
| 8 |  | Reiley Jeyapaul,
Aviral Shrivastava:
Smart cache cleaning: energy efficient vulnerability reduction in embedded processors.
CASES 2011: 105-114 |
| 7 |  | Aviral Shrivastava,
Jared Pager,
Reiley Jeyapaul,
Mahdi Hamzeh,
Sarma B. K. Vrudhula:
Enabling Multithreading on CGRAs.
ICPP 2011: 255-264 |
| 6 |  | Reiley Jeyapaul,
Fei Hong,
Abhishek Rhisheekesan,
Aviral Shrivastava,
Kyoungwoo Lee:
UnSync: A Soft Error Resilient Redundant Multicore Architecture.
ICPP 2011: 632-641 |
| 2010 |
| 5 |  | Aviral Shrivastava,
Jongeun Lee,
Reiley Jeyapaul:
Cache vulnerability equations for protecting data in embedded processor caches from soft errors.
LCTES 2010: 143-152 |
| 4 |  | Reiley Jeyapaul,
Aviral Shrivastava:
B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems.
SCOPES 2010: 2 |
| 3 |  | Reiley Jeyapaul,
Aviral Shrivastava:
Code Transformations for TLB Power Reduction.
International Journal of Parallel Programming 38(3-4): 254-276 (2010) |
| 2009 |
| 2 |  | Reiley Jeyapaul,
Sandeep Marathe,
Aviral Shrivastava:
Code Transformations for TLB Power Reduction.
VLSI Design 2009: 413-418 |
| 2008 |
| 1 |  | Jonghee W. Yoon,
Aviral Shrivastava,
Sanghyun Park,
Minwook Ahn,
Reiley Jeyapaul,
Yunheung Paek:
SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures.
ASP-DAC 2008: 776-782 |